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整理代码，尝试添加串口中断发送

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HEYAHONG 2024-04-08 11:56:02 +08:00
parent a55b96b344
commit 7fd9bf8eff
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GPG Key ID: 97E3E469FE2C920B
9 changed files with 48 additions and 43 deletions
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12
FW/Core/001-base_rt/libraries/rt_drivers/drv_adc.c
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@ -22,7 +22,7 @@
static ADC_HandleTypeDef adc_config[] = static ADC_HandleTypeDef adc_config[] =
{ {
#ifdef BSP_USING_ADC1 #ifdef BSP_USING_ADC1
{ \ { \
.Instance = ADC1, \ .Instance = ADC1, \
.Init.ADC_Mode = ADC_Mode_Independent, \ .Init.ADC_Mode = ADC_Mode_Independent, \
.Init.ADC_ScanConvMode = DISABLE, \ .Init.ADC_ScanConvMode = DISABLE, \
@ -34,7 +34,7 @@ static ADC_HandleTypeDef adc_config[] =
#endif #endif
#ifdef BSP_USING_ADC2 #ifdef BSP_USING_ADC2
{ \ { \
.Instance = ADC2, \ .Instance = ADC2, \
.Init.ADC_Mode = ADC_Mode_Independent, \ .Init.ADC_Mode = ADC_Mode_Independent, \
.Init.ADC_ScanConvMode = DISABLE, \ .Init.ADC_ScanConvMode = DISABLE, \
@ -183,13 +183,13 @@ static rt_err_t air32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
} }
#endif #endif
/* ADC channel number is up to 17 */ /* ADC channel number is up to 17 */
#if !defined(ADC_CHANNEL_18) #if !defined(ADC_CHANNEL_18)
if (channel <= 17) if (channel <= 17)
/* ADC channel number is up to 19 */ /* ADC channel number is up to 19 */
#elif defined(ADC_CHANNEL_19) #elif defined(ADC_CHANNEL_19)
if (channel <= 19) if (channel <= 19)
/* ADC channel number is up to 18 */ /* ADC channel number is up to 18 */
#else #else
if (channel <= 18) if (channel <= 18)
#endif #endif
@ -211,7 +211,7 @@ static rt_err_t air32_get_adc_value(struct rt_adc_device *device, rt_uint32_t ch
ADC_ChanConf.Rank = 1; ADC_ChanConf.Rank = 1;
ADC_ChanConf.SamplingTime = ADC_SampleTime_239Cycles5; ADC_ChanConf.SamplingTime = ADC_SampleTime_239Cycles5;
ADC_RegularChannelConfig(air32_adc_handler->Instance,ADC_ChanConf.Channel , ADC_ChanConf.Rank, ADC_ChanConf.SamplingTime ); ADC_RegularChannelConfig(air32_adc_handler->Instance,ADC_ChanConf.Channel, ADC_ChanConf.Rank, ADC_ChanConf.SamplingTime );
/* start ADC */ /* start ADC */
ADC_SoftwareStartConvCmd(air32_adc_handler->Instance, ENABLE); ADC_SoftwareStartConvCmd(air32_adc_handler->Instance, ENABLE);

2
FW/Core/001-base_rt/libraries/rt_drivers/drv_flash.c
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@ -161,7 +161,7 @@ int air32_flash_erase(rt_uint32_t addr, rt_size_t size)
addr += FLASH_PAGE_SIZE; addr += FLASH_PAGE_SIZE;
} }
FLASH_Lock(); FLASH_Lock();
__exit: __exit:
if(result != RT_EOK) if(result != RT_EOK)

14
FW/Core/001-base_rt/libraries/rt_drivers/drv_gpio.c
View File

@ -262,9 +262,9 @@ static rt_err_t air32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
level = rt_hw_interrupt_disable(); level = rt_hw_interrupt_disable();
if (pin_irq_hdr_tab[irqindex].pin == pin && if (pin_irq_hdr_tab[irqindex].pin == pin &&
pin_irq_hdr_tab[irqindex].hdr == hdr && pin_irq_hdr_tab[irqindex].hdr == hdr &&
pin_irq_hdr_tab[irqindex].mode == mode && pin_irq_hdr_tab[irqindex].mode == mode &&
pin_irq_hdr_tab[irqindex].args == args) pin_irq_hdr_tab[irqindex].args == args)
{ {
rt_hw_interrupt_enable(level); rt_hw_interrupt_enable(level);
return RT_EOK; return RT_EOK;
@ -321,9 +321,9 @@ static rt_err_t air32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
rt_base_t level; rt_base_t level;
rt_int32_t irqindex = -1; rt_int32_t irqindex = -1;
rt_uint8_t gpio_port_souce=0; rt_uint8_t gpio_port_souce=0;
GPIO_InitTypeDef GPIO_InitStruct={0}; GPIO_InitTypeDef GPIO_InitStruct= {0};
NVIC_InitTypeDef NVIC_InitStructure={0}; NVIC_InitTypeDef NVIC_InitStructure= {0};
EXTI_InitTypeDef EXTI_InitStructure={0}; EXTI_InitTypeDef EXTI_InitStructure= {0};
if (PIN_PORT(pin) >= PIN_AIRPORT_MAX) if (PIN_PORT(pin) >= PIN_AIRPORT_MAX)
{ {
@ -349,7 +349,7 @@ static rt_err_t air32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
irqmap = &pin_irq_map[irqindex]; irqmap = &pin_irq_map[irqindex];
/* Configure GPIO_InitStructure */ /* Configure GPIO_InitStructure */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO , ENABLE); RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
/* Configure GPIO_InitStructure */ /* Configure GPIO_InitStructure */
GPIO_InitStruct.GPIO_Pin = PIN_AIRPIN(pin); GPIO_InitStruct.GPIO_Pin = PIN_AIRPIN(pin);

12
FW/Core/001-base_rt/libraries/rt_drivers/drv_hwtimer.c
View File

@ -185,12 +185,12 @@ static rt_err_t air32_hwtimer_control(struct rt_hwtimer_device *device, rt_uint3
} }
static const struct rt_hwtimer_ops hwtimer_ops = static const struct rt_hwtimer_ops hwtimer_ops =
{ {
.init = air32_hwtimer_init, .init = air32_hwtimer_init,
.start = air32_hwtimer_start, .start = air32_hwtimer_start,
.stop = air32_hwtimer_stop, .stop = air32_hwtimer_stop,
.count_get = air32_hwtimer_counter_get, .count_get = air32_hwtimer_counter_get,
.control = air32_hwtimer_control, .control = air32_hwtimer_control,
}; };
static int rt_hw_hwtimer_init(void) static int rt_hw_hwtimer_init(void)

6
FW/Core/001-base_rt/libraries/rt_drivers/drv_soft_i2c.c
View File

@ -207,9 +207,9 @@ int rt_sw_i2c_init(void)
air32_i2c_bus_unlock(&soft_i2c_config[i]); air32_i2c_bus_unlock(&soft_i2c_config[i]);
LOG_D("software simulation %s init done, pin scl: %d, pin sda %d", LOG_D("software simulation %s init done, pin scl: %d, pin sda %d",
soft_i2c_config[i].bus_name, soft_i2c_config[i].bus_name,
soft_i2c_config[i].scl, soft_i2c_config[i].scl,
soft_i2c_config[i].sda); soft_i2c_config[i].sda);
} }
return RT_EOK; return RT_EOK;

13
FW/Core/001-base_rt/libraries/rt_drivers/drv_spi.c
View File

@ -34,13 +34,15 @@ struct spi_bus_device
static struct spi_bus_device spi_bus_device_list[] = { static struct spi_bus_device spi_bus_device_list[] = {
#ifdef BSP_USING_SPI1 #ifdef BSP_USING_SPI1
{.periph = SPI1, { .periph = SPI1,
.name = "spi1"}, .name = "spi1"
},
#endif #endif
#ifdef BSP_USING_SPI2 #ifdef BSP_USING_SPI2
{.periph = SPI2, { .periph = SPI2,
.name = "spi2"}, .name = "spi2"
},
#endif #endif
}; };
@ -290,7 +292,8 @@ static rt_ssize_t air32_spi_xfer(struct rt_spi_device *device, struct rt_spi_mes
static struct rt_spi_ops spi_ops = { static struct rt_spi_ops spi_ops = {
.configure = air32_spi_configure, .configure = air32_spi_configure,
.xfer = air32_spi_xfer}; .xfer = air32_spi_xfer
};
int rt_hw_spi_init(void) int rt_hw_spi_init(void)
{ {

14
FW/Core/001-base_rt/libraries/rt_drivers/drv_usart.c
View File

@ -234,6 +234,7 @@ static rt_err_t air32_control(struct rt_serial_device *serial, int cmd, void *ar
NVIC_Init(&NVIC_InitStruct); NVIC_Init(&NVIC_InitStruct);
/* disable interrupt */ /* disable interrupt */
USART_ITConfig(uart->config->Instance,USART_IT_RXNE,DISABLE); USART_ITConfig(uart->config->Instance,USART_IT_RXNE,DISABLE);
USART_ITConfig(uart->config->Instance,USART_IT_TC,DISABLE);
break; break;
@ -245,6 +246,7 @@ static rt_err_t air32_control(struct rt_serial_device *serial, int cmd, void *ar
NVIC_Init(&NVIC_InitStruct); NVIC_Init(&NVIC_InitStruct);
/* enable interrupt */ /* enable interrupt */
USART_ITConfig(uart->config->Instance, USART_IT_RXNE,ENABLE); USART_ITConfig(uart->config->Instance, USART_IT_RXNE,ENABLE);
USART_ITConfig(uart->config->Instance, USART_IT_TC,ENABLE);
break; break;
} }
@ -293,7 +295,6 @@ static void uart_isr(struct rt_serial_device *serial)
RT_ASSERT(serial != RT_NULL); RT_ASSERT(serial != RT_NULL);
uart = rt_container_of(serial, struct air32_uart, serial); uart = rt_container_of(serial, struct air32_uart, serial);
/* UART in mode Receiver -------------------------------------------------*/
if ((USART_GetITStatus(uart->config->Instance, USART_IT_RXNE) != RESET) && (RESET != USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE))) if ((USART_GetITStatus(uart->config->Instance, USART_IT_RXNE) != RESET) && (RESET != USART_GetFlagStatus(uart->config->Instance, USART_FLAG_RXNE)))
{ {
@ -301,6 +302,12 @@ static void uart_isr(struct rt_serial_device *serial)
USART_ClearITPendingBit(uart->config->Instance, USART_IT_RXNE); USART_ClearITPendingBit(uart->config->Instance, USART_IT_RXNE);
USART_ClearFlag(uart->config->Instance, USART_FLAG_RXNE); USART_ClearFlag(uart->config->Instance, USART_FLAG_RXNE);
} }
else if ((USART_GetITStatus(uart->config->Instance, USART_IT_TC) != RESET) && (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TC) != RESET))
{
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
USART_ClearITPendingBit(uart->config->Instance, USART_IT_TC);
USART_ClearFlag(uart->config->Instance, USART_FLAG_TC);
}
else else
{ {
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_CTS) != RESET) if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_CTS) != RESET)
@ -312,11 +319,6 @@ static void uart_isr(struct rt_serial_device *serial)
{ {
USART_ClearFlag(uart->config->Instance, USART_FLAG_LBD); USART_ClearFlag(uart->config->Instance, USART_FLAG_LBD);
} }
if (USART_GetFlagStatus(uart->config->Instance, USART_FLAG_TC) != RESET)
{
USART_ClearFlag(uart->config->Instance, USART_FLAG_TC);
}
} }
} }

16
FW/Core/001-base_rt/libraries/rt_drivers/drv_wdt.c
View File

@ -44,15 +44,15 @@ static rt_err_t air32_wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
case RT_DEVICE_CTRL_WDT_KEEPALIVE: case RT_DEVICE_CTRL_WDT_KEEPALIVE:
IWDG_ReloadCounter(); IWDG_ReloadCounter();
break; break;
/* set watchdog timeout */ /* set watchdog timeout */
case RT_DEVICE_CTRL_WDT_SET_TIMEOUT: case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
wdt_dev->reload = (*((rt_uint32_t *)arg)) * 40000 / 256; wdt_dev->reload = (*((rt_uint32_t *)arg)) * 40000 / 256;
if (wdt_dev->reload > 0xFFF) if (wdt_dev->reload > 0xFFF)
{ {
LOG_E("wdg set timeout parameter too large, please less than %ds", 0xFFF * 256 / 40000); LOG_E("wdg set timeout parameter too large, please less than %ds", 0xFFF * 256 / 40000);
return -RT_EINVAL; return -RT_EINVAL;
} }
if (wdt_dev->is_start) if (wdt_dev->is_start)
{ {
@ -64,7 +64,7 @@ static rt_err_t air32_wdt_control(rt_watchdog_t *wdt, int cmd, void *arg)
} }
break; break;
case RT_DEVICE_CTRL_WDT_GET_TIMEOUT: case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
(*((rt_uint32_t *)arg)) = wdt_dev->reload * 256 / 40000; (*((rt_uint32_t *)arg)) = wdt_dev->reload * 256 / 40000;
break; break;
case RT_DEVICE_CTRL_WDT_START: case RT_DEVICE_CTRL_WDT_START:
IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable); IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);

2
FW/Core/001-base_rt/project.uvoptx
View File

@ -383,7 +383,7 @@
<Group> <Group>
<GroupName>DeviceDrivers</GroupName> <GroupName>DeviceDrivers</GroupName>
<tvExp>0</tvExp> <tvExp>1</tvExp>
<tvExpOptDlg>0</tvExpOptDlg> <tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel> <cbSel>0</cbSel>
<RteFlg>0</RteFlg> <RteFlg>0</RteFlg>