RT-Thread/rt-thread
1
0
Fork 0
mirror of https://github.com/RT-Thread/rt-thread.git synced 2025-10-22 00:03:02 +08:00
Code Issues Packages Projects Releases Wiki Activity
12,391 Commits 15 Branches 42 Tags
169b09004ee9ed15c1e8cb15c7d2fe3042895f29
Commit Graph

5 Commits

Author SHA1 Message Date
Meco Man
6c907c3a47 [libcpu] auto formatted 2021-03-27 17:51:56 +08:00
Jiaxun Yang
7c66501861 [libcpu] Refine MIPS common code 
MIPS common code was highly duplicated, This commit
is a attempt to clean-up and refine these code.

The context and exception handle flow is mostly identical
with Linux, but a notable difference is that when FPU enabled,
we save FP registers in stackframe unconditionally.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
 2019-12-11 15:24:04 +08:00
Bernard Xiong
72782e9203 convert end of line 2013-01-08 05:05:02 -08:00
bernard.xiong@gmail.com
67eff19969 add init loongson soc3210 porting. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1012 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2010-10-15 23:40:44 +00:00
bernard.xiong
e94adf07ca add init Jz47xx porting. 
git-svn-id: https://rt-thread.googlecode.com/svn/trunk@792 bbd45198-f89e-11dd-88c7-29a3b14d5316
 2010-07-14 09:51:49 +00:00