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a8d27156a312c2061b8ff5caeb0c2f81f08e204e
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6 Commits

Author SHA1 Message Date
Grissiom
17a75eaa02 lpc43xx: remove the fpu settings in startup_LPC43xx_M0 2015-01-07 17:15:49 +08:00
Grissiom
fca84daa9d lpc43xx: fix the startup code for GCC 2015-01-06 12:42:12 +08:00
Grissiom
090adcf4c0 lpc43xx: don't set the Clock again in M0 core 
M0 core is always booted by the M4 core. It means that if we are running
in M0, the clock is always configured.
 2015-01-06 10:46:32 +08:00
Grissiom
a447b5f3cf lpc43xx: refactor uart drivers 2015-01-06 10:25:43 +08:00
nongxiaoming
67e79c3e97 lpc43xx:update the startup code. 2014-07-15 15:40:05 +08:00
nongxiaoming
e152b68e33 add the lpc43xx bsp support. 2014-07-13 14:13:39 +08:00