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15 lines
580 B
Plaintext
15 lines
580 B
Plaintext
/* Bit fields for LESENSE CURCH */
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CURCH,
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Linix,
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Linix 45ZWN24-40 2 0.5 Ohm 0.400 mH 2.34A 24V
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* Linix 45ZWN24-40 (PMSM motor dedicated for NXP FRDM-MC-LVMTR kit)
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DUE SCHEM. PIN MAPPING SAM3X DUE SCHEM. BOARD LABEL
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SCHEM,
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* ADDR -> BTC & TBE - Send one more byte
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TBE,
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/* All even touch pads have the same position for the THN bits.
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/* All odd touch pads have the same position for the THN bits.
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THN,
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# define AES_ISR_URAT_WORRDACC (5 << AES_ISR_URAT_SHIFT) /* WRONLY register read access */
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WRONLY,
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