[fix][lhal] code check by coverity

This commit is contained in:
jzlv 2023-11-03 10:02:41 +08:00
parent c2d9f86506
commit 0bb2bbcdf4
4 changed files with 8 additions and 101 deletions

View File

@ -184,11 +184,6 @@ bool bflb_timer_get_compint_status(struct bflb_device_s *dev, uint8_t cmp_no);
*/
void bflb_timer_compint_clear(struct bflb_device_s *dev, uint8_t cmp_no);
#if !defined(BL702) || !defined(BL602)
void bflb_timer_capture_init(struct bflb_device_s *dev, const struct bflb_timer_capture_config_s *config);
uint32_t bflb_timer_capture_get_pulsewidth(struct bflb_device_s *dev);
#endif
#ifdef __cplusplus
}
#endif
@ -201,4 +196,4 @@ uint32_t bflb_timer_capture_get_pulsewidth(struct bflb_device_s *dev);
* @}
*/
#endif
#endif

View File

@ -417,6 +417,11 @@ void bflb_rx_cycle_dma_init(struct bflb_rx_cycle_dma *rx_dma,
rx_transfers[1].nbytes = dst_buf_size / 2;
int used_count = bflb_dma_channel_lli_reload(dma_ch, rx_llipool, rx_llipool_size, rx_transfers, 2);
if (used_count < 0) {
while (1) {}
}
bflb_dma_channel_lli_link_head(dma_ch, rx_llipool, used_count);
}
@ -530,4 +535,4 @@ int bflb_dma_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
break;
}
return ret;
}
}

View File

@ -305,7 +305,6 @@ ATTR_TCM_SECTION int bflb_spi_poll_exchange(struct bflb_device_s *dev, const voi
putreg32(regval, reg_base + SPI_FIFO_WDATA_OFFSET);
txbuffer += 2;
break;
case 3:
case 4:
regval = *(uint32_t *)txbuffer;
putreg32(regval, reg_base + SPI_FIFO_WDATA_OFFSET);
@ -374,8 +373,6 @@ ATTR_TCM_SECTION int bflb_spi_poll_exchange(struct bflb_device_s *dev, const voi
tx_cnt--;
}
break;
case 3:
/* discard the high 8 bits of data when 24bit-frame */
case 4:
if (rxbuffer) {
*((uint32_t *)rxbuffer) = (uint32_t)regval;
@ -697,4 +694,4 @@ int bflb_spi_feature_control(struct bflb_device_s *dev, int cmd, size_t arg)
}
return ret;
}
}

View File

@ -200,93 +200,3 @@ void bflb_timer_compint_clear(struct bflb_device_s *dev, uint8_t cmp_no)
regval |= (1 << cmp_no);
putreg32(regval, reg_base + TIMER_TICR0_OFFSET + 4 * dev->idx);
}
#if !defined(BL702) && !defined(BL602)
void bflb_timer_capture_init(struct bflb_device_s *dev, const struct bflb_timer_capture_config_s *config)
{
uint32_t regval;
uint32_t reg_base;
reg_base = dev->reg_base;
#if defined(BL702L)
regval = getreg32(0x20000000 + 0xc);
regval &= ~(0x3 << 14);
switch (config->pin & 0x03) {
case 0:
regval &= ~(1 << 10);
regval |= (0 << 14);
break;
case 1:
regval &= ~(1 << 11);
regval |= (1 << 14);
break;
case 2:
regval &= ~(1 << 12);
regval |= (2 << 14);
break;
case 3:
regval &= ~(1 << 13);
regval |= (3 << 14);
break;
default:
break;
}
putreg32(regval, 0x20000000 + 0xc);
struct bflb_device_s *gpio = bflb_device_get_by_name("gpio");
bflb_gpio_init(gpio, config->pin, (0 << GPIO_FUNC_SHIFT) | GPIO_ALTERNATE | GPIO_FLOAT | GPIO_SMT_EN | GPIO_DRV_1);
#else
regval = getreg32(0x20000000 + 0x258);
regval &= ~(3 << 12);
switch (config->pin & 0x03) {
case 0:
regval &= ~(1 << 8);
regval |= (0 << 12);
break;
case 1:
regval &= ~(1 << 9);
regval |= (1 << 12);
break;
case 2:
regval &= ~(1 << 10);
regval |= (2 << 12);
break;
case 3:
regval &= ~(1 << 11);
regval |= (3 << 12);
break;
default:
break;
}
putreg32(regval, 0x20000000 + 0x258);
struct bflb_device_s *gpio = bflb_device_get_by_name("gpio");
bflb_gpio_init(gpio, config->pin, (31 << GPIO_FUNC_SHIFT) | GPIO_ALTERNATE | GPIO_FLOAT | GPIO_SMT_EN | GPIO_DRV_1);
#endif
regval = getreg32(reg_base + TIMER_GPIO_OFFSET);
/* polarity: 1->neg, 0->pos */
if (config->polarity == TIMER_CAPTURE_POLARITY_NEGATIVE) {
regval |= (1 << (5 + dev->idx));
} else {
regval &= ~(1 << (5 + dev->idx));
}
regval |= TIMER0_GPIO_EN;
putreg32(regval, reg_base + TIMER_GPIO_OFFSET);
}
uint32_t bflb_timer_capture_get_pulsewidth(struct bflb_device_s *dev)
{
uint32_t reg_base;
uint32_t lat1 = 0;
uint32_t lat2 = 0;
reg_base = dev->reg_base;
do {
lat1 = getreg32(reg_base + TIMER_GPIO_LAT1_OFFSET);
lat2 = getreg32(reg_base + TIMER_GPIO_LAT2_OFFSET);
} while (!(getreg32(reg_base + TIMER_GPIO_OFFSET) & TIMER_GPIO_LAT_OK) || (lat1 >= lat2));
return (lat2 - lat1);
}
#endif