17 Commits

Author	SHA1	Message	Date
pfchen	7e7b564272	[update][sdk]release v2.2.0 version	2025-04-30 16:31:06 +08:00
jzlv	be623ceb7f	[sync] release code with gitlab commit d7b03e2056124b841033d34776def8c1e5bb8d3d	2024-02-06 17:23:13 +08:00
jzlv	0773ad89e3	[fix] rename rf to phyrf	2023-10-19 11:25:33 +08:00
jzlv	070719258d	[sync] sync code ... * format ld section * add no vector irq mode * add psram copy function * update lhal, add some api, update dsp lib * enable wifi coex * update flash tool to v1.0.5 * add uart dma rto, usbh hid keyboard demo * misc updated	2023-05-09 15:51:47 +08:00
jzlv	c84e9b7738	[refactor] move std/port/startup into std dir, in order to free space for rf	2022-12-21 20:52:37 +08:00
jzlv	d9adf21997	[refactor] move utils into component	2022-12-08 11:00:45 +08:00
jzlv	664c605ada	[refactor] refactor mcu sdk framework, add BL702,BL616,BL808 CHIP support	2022-10-21 10:20:58 +08:00
jzlv	9c67a54e24	[refactor] remove bflb_platform.h from bl602 and bl702 driver,include it in anywhere used	2021-10-19 20:04:23 +08:00
jzlv	97df783484	[fix][irq] add nesting process for enable irq and disable irq	2021-07-28 15:03:33 +08:00
jzlv	46ed669b1a	[chore][cmake] refactor cmake building style,remove all components support,using auto component building instead	2021-07-26 10:56:51 +08:00
jzlv	66635f84f7	[refactor][board] rename bl70x with bl702	2021-07-16 15:56:37 +08:00
jzlv	8dca249d77	[refactor][board] refactor board directory structure	2021-07-15 10:15:17 +08:00
jzlv	79ff39938b	[chore] update tools	2021-06-20 12:33:52 +08:00
jzlv	21c888024a	[feat] modify cmake build stream	2021-06-07 19:08:31 +08:00
jzlv	f3e7d8f8a4	[feat] update flash tool and openocd cfg	2021-06-04 18:15:39 +08:00
jzlv	064e9c91f7	[fix] fix cmake files	2021-04-27 12:35:37 +08:00
jzlv	a2fca7a36d	first commit	2021-04-13 19:27:30 +08:00