6 Commits

Author	SHA1	Message	Date
Dong Heng	3efd52d2e0	feat(bootloader): Boot close IRQ with level 3	2022-05-13 19:46:17 +08:00
Dong Heng	53e4e1687c	feat(esp8266): hardware check task stack overflow	2019-12-27 16:26:15 +08:00
dongheng	b061230056	feat(esp8266): refactor CCOMPARE timer and system time by microseconds ... old: CCOMPARE timer triggers when CCOUNT increase to equal to CCOMPARE, then ISR will increase integer of "_xt_tick_divisor" to CCOMPARE and wait for next interrupt triggering now: CCOMPARE timer triggers when CCOUNT increase to equal to CCOMPARE, then ISR will reset CCOUNT to be 0 and reset CCOMPARE to be integer of "_xt_tick_divisor", then wait for next interrupt triggering Using the new method, we may get the CCOUNT value without considing if it has overflowed. System running microseconds = g_os_ticks * microseconds per tick + CCOUNT.	2019-08-19 14:03:20 +08:00
dongheng	f071399ade	feat(freertos): Add CPU wait to save power	2019-04-22 17:48:40 +08:00
dongheng	913188fdf3	feat(freertos): Simplify xtensa platform code ... All normal ISRs are called by "_xt_isr_handler".	2019-04-16 19:49:06 +08:00
dongheng	7fbb68f4ea	feat(esp8266): Add API to get microseconds	2019-03-12 09:39:07 +08:00