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feat(espefuse): Adds ADC calibration data for ESP32-P4
This commit is contained in:

committed by
Radim Karniš

parent
88319dbc31
commit
215e4b83cc
@@ -102,12 +102,11 @@ class EspEfuses(base_fields.EspEfusesBase):
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for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
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]
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else:
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# TODO add processing of self.Fields.BLOCK2_CALIBRATION_EFUSES
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# if self["BLK_VERSION_MINOR"].get() == 1:
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# self.efuses += [
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# EfuseField.convert(self, efuse)
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# for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
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# ]
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if self.get_block_version() >= 1:
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self.efuses += [
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EfuseField.convert(self, efuse)
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for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
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]
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self.efuses += [
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EfuseField.convert(self, efuse) for efuse in self.Fields.CALC
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]
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@@ -114,12 +114,8 @@ class EfuseDefineFields(EfuseFieldsBase):
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def __init__(self, extend_efuse_table) -> None:
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# List of efuse fields from TRM the chapter eFuse Controller.
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self.EFUSES = []
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self.KEYBLOCKS = []
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# if BLK_VERSION_MINOR is 1, these efuse fields are in BLOCK2
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self.BLOCK2_CALIBRATION_EFUSES = []
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self.CALC: List = []
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dir_name = os.path.dirname(os.path.abspath(__file__))
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@@ -189,7 +189,11 @@ def set_flash_voltage(esp, efuses, args):
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def adc_info(esp, efuses, args):
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print("not supported yet")
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print("Block version:", efuses.get_block_version())
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if efuses.get_block_version() >= 1:
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for efuse in efuses:
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if efuse.category == "calibration":
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print(f"{efuse.name:<30} = ", efuses[efuse.name].get())
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def key_block_is_unused(block, key_purpose_block):
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@@ -1,4 +1,4 @@
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VER_NO: d4a48929387e281bd05db8cfb3a85f60
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VER_NO: 73787d3f5ae45b80abca925a7562120b
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EFUSES:
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WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS_REG, bloc: 'B0,B1,B2,B3'}
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RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 7, start : 32, type : 'uint:7', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'}
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@@ -83,16 +83,39 @@ EFUSES:
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TEMP : {show: y, blk : 1, word: 2, pos: 16, len : 2, start : 80, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Operating temperature of the ESP chip, rloc: 'EFUSE_RD_MAC_SYS_2_REG[17:16]', bloc: 'B10[1:0]'}
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PSRAM_VENDOR : {show: y, blk : 1, word: 2, pos: 18, len : 2, start : 82, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PSRAM vendor, rloc: 'EFUSE_RD_MAC_SYS_2_REG[19:18]', bloc: 'B10[3:2]'}
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PKG_VERSION : {show: y, blk : 1, word: 2, pos: 20, len : 3, start : 84, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS_2_REG[22:20]', bloc: 'B10[6:4]'}
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RESERVED_1_87 : {show: n, blk : 1, word: 2, pos: 23, len : 9, start : 87, type : 'uint:9', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS_2_REG[31:23]', bloc: 'B10[7],B11'}
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MAC_RESERVED_2 : {show: n, blk : 1, word: 3, pos : 0, len : 18, start : 96, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SYS_3_REG[17:0]', bloc: 'B12,B13,B14[1:0]'}
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SYS_DATA_PART0_0 : {show: n, blk : 1, word: 3, pos: 18, len : 14, start: 114, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the first 14 bits of the zeroth part of system data, rloc: 'EFUSE_RD_MAC_SYS_3_REG[31:18]', bloc: 'B14[7:2],B15'}
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SYS_DATA_PART0_1 : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the first 32 bits of the zeroth part of system data, rloc: EFUSE_RD_MAC_SYS_4_REG, bloc: 'B16,B17,B18,B19'}
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SYS_DATA_PART0_2 : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the second 32 bits of the zeroth part of system data, rloc: EFUSE_RD_MAC_SYS_5_REG, bloc: 'B20,B21,B22,B23'}
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RESERVED_1_87 : {show: n, blk : 1, word: 2, pos: 23, len : 1, start : 87, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS_2_REG[23]', bloc: 'B10[7]'}
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LDO_VO1_DREF : {show: y, blk : 1, word: 2, pos: 24, len : 4, start : 88, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO1 parameter, rloc: 'EFUSE_RD_MAC_SYS_2_REG[27:24]', bloc: 'B11[3:0]'}
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LDO_VO2_DREF : {show: y, blk : 1, word: 2, pos: 28, len : 4, start : 92, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO2 parameter, rloc: 'EFUSE_RD_MAC_SYS_2_REG[31:28]', bloc: 'B11[7:4]'}
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LDO_VO1_MUL : {show: y, blk : 1, word: 3, pos : 0, len : 3, start : 96, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO1 parameter, rloc: 'EFUSE_RD_MAC_SYS_3_REG[2:0]', bloc: 'B12[2:0]'}
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LDO_VO2_MUL : {show: y, blk : 1, word: 3, pos : 3, len : 3, start : 99, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO2 parameter, rloc: 'EFUSE_RD_MAC_SYS_3_REG[5:3]', bloc: 'B12[5:3]'}
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LDO_VO3_K : {show: y, blk : 1, word: 3, pos : 6, len : 8, start: 102, type : 'uint:8', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO3 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS_3_REG[13:6]', bloc: 'B12[7:6],B13[5:0]'}
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LDO_VO3_VOS : {show: y, blk : 1, word: 3, pos: 14, len : 6, start: 110, type : 'uint:6', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO3 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS_3_REG[19:14]', bloc: 'B13[7:6],B14[3:0]'}
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LDO_VO3_C : {show: y, blk : 1, word: 3, pos: 20, len : 6, start: 116, type : 'uint:6', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO3 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS_3_REG[25:20]', bloc: 'B14[7:4],B15[1:0]'}
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LDO_VO4_K : {show: y, blk : 1, word: 3, pos: 26, len : 8, start: 122, type : 'uint:8', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO4 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS_3_REG[31:26]', bloc: 'B15[7:2],B16[1:0]'}
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LDO_VO4_VOS : {show: y, blk : 1, word: 4, pos : 2, len : 6, start: 130, type : 'uint:6', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO4 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS_4_REG[7:2]', bloc: 'B16[7:2]'}
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LDO_VO4_C : {show: y, blk : 1, word: 4, pos : 8, len : 6, start: 136, type : 'uint:6', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Output VO4 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS_4_REG[13:8]', bloc: 'B17[5:0]'}
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RESERVED_1_142 : {show: n, blk : 1, word: 4, pos: 14, len : 2, start: 142, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS_4_REG[15:14]', bloc: 'B17[7:6]'}
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ACTIVE_HP_DBIAS : {show: y, blk : 1, word: 4, pos: 16, len : 4, start: 144, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Active HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS_4_REG[19:16]', bloc: 'B18[3:0]'}
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ACTIVE_LP_DBIAS : {show: y, blk : 1, word: 4, pos: 20, len : 4, start: 148, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Active LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS_4_REG[23:20]', bloc: 'B18[7:4]'}
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LSLP_HP_DBIAS : {show: y, blk : 1, word: 4, pos: 24, len : 4, start: 152, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: LSLP HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS_4_REG[27:24]', bloc: 'B19[3:0]'}
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DSLP_DBG : {show: y, blk : 1, word: 4, pos: 28, len : 4, start: 156, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: DSLP BDG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS_4_REG[31:28]', bloc: 'B19[7:4]'}
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DSLP_LP_DBIAS : {show: y, blk : 1, word: 5, pos : 0, len : 5, start: 160, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: DSLP LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS_5_REG[4:0]', bloc: 'B20[4:0]'}
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LP_DCDC_DBIAS_VOL_GAP : {show: y, blk : 1, word: 5, pos : 5, len : 5, start: 165, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: DBIAS gap between LP and DCDC, rloc: 'EFUSE_RD_MAC_SYS_5_REG[9:5]', bloc: 'B20[7:5],B21[1:0]'}
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RESERVED_1_170 : {show: n, blk : 1, word: 5, pos: 10, len : 22, start: 170, type : 'uint:22', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS_5_REG[31:10]', bloc: 'B21[7:2],B22,B23'}
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OPTIONAL_UNIQUE_ID : {show: y, blk : 2, word: 0, pos : 0, len: 128, start : 0, type: 'bytes:16', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'}
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SYS_DATA_PART1_4 : {show: n, blk : 2, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Stores the fourth 32 bits of the first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA4_REG, bloc: 'B16,B17,B18,B19'}
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SYS_DATA_PART1_5 : {show: n, blk : 2, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Stores the fifth 32 bits of the first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA5_REG, bloc: 'B20,B21,B22,B23'}
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SYS_DATA_PART1_6 : {show: n, blk : 2, word: 6, pos : 0, len : 32, start: 192, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Stores the sixth 32 bits of the first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA6_REG, bloc: 'B24,B25,B26,B27'}
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SYS_DATA_PART1_7 : {show: n, blk : 2, word: 7, pos : 0, len : 32, start: 224, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Stores the seventh 32 bits of the first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA7_REG, bloc: 'B28,B29,B30,B31'}
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ADC1_AVE_INITCODE_ATTEN0 : {show: y, blk : 2, word: 4, pos : 0, len : 10, start: 128, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[9:0]', bloc: 'B16,B17[1:0]'}
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ADC1_AVE_INITCODE_ATTEN1 : {show: y, blk : 2, word: 4, pos: 10, len : 10, start: 138, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[19:10]', bloc: 'B17[7:2],B18[3:0]'}
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ADC1_AVE_INITCODE_ATTEN2 : {show: y, blk : 2, word: 4, pos: 20, len : 10, start: 148, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[29:20]', bloc: 'B18[7:4],B19[5:0]'}
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ADC1_AVE_INITCODE_ATTEN3 : {show: y, blk : 2, word: 4, pos: 30, len : 10, start: 158, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:30]', bloc: 'B19[7:6],B20'}
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ADC2_AVE_INITCODE_ATTEN0 : {show: y, blk : 2, word: 5, pos : 8, len : 10, start: 168, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC2 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[17:8]', bloc: 'B21,B22[1:0]'}
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ADC2_AVE_INITCODE_ATTEN1 : {show: y, blk : 2, word: 5, pos: 18, len : 10, start: 178, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC2 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[27:18]', bloc: 'B22[7:2],B23[3:0]'}
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ADC2_AVE_INITCODE_ATTEN2 : {show: y, blk : 2, word: 5, pos: 28, len : 10, start: 188, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC2 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[31:28]', bloc: 'B23[7:4],B24[5:0]'}
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ADC2_AVE_INITCODE_ATTEN3 : {show: y, blk : 2, word: 6, pos : 6, len : 10, start: 198, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC2 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[15:6]', bloc: 'B24[7:6],B25'}
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ADC1_HI_DOUT_ATTEN0 : {show: y, blk : 2, word: 6, pos: 16, len : 10, start: 208, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI_DOUT of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[25:16]', bloc: 'B26,B27[1:0]'}
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ADC1_HI_DOUT_ATTEN1 : {show: y, blk : 2, word: 6, pos: 26, len : 10, start: 218, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI_DOUT of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[31:26]', bloc: 'B27[7:2],B28[3:0]'}
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ADC1_HI_DOUT_ATTEN2 : {show: y, blk : 2, word: 7, pos : 4, len : 10, start: 228, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI_DOUT of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[13:4]', bloc: 'B28[7:4],B29[5:0]'}
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ADC1_HI_DOUT_ATTEN3 : {show: y, blk : 2, word: 7, pos: 14, len : 10, start: 238, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI_DOUT of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[23:14]', bloc: 'B29[7:6],B30'}
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RESERVED_2_248 : {show: n, blk : 2, word: 7, pos: 24, len : 8, start: 248, type : 'uint:8', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[31:24]', bloc: B31}
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BLOCK_USR_DATA : {show: y, blk : 3, word: 0, pos : 0, len: 192, start : 0, type: 'bytes:24', wr_dis : 22, rd_dis: null, alt : USER_DATA, dict : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'}
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RESERVED_3_192 : {show: n, blk : 3, word: 6, pos : 0, len : 8, start: 192, type : 'uint:8', wr_dis : 22, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24}
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CUSTOM_MAC : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'}
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@@ -103,4 +126,27 @@ EFUSES:
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BLOCK_KEY3 : {show: y, blk : 7, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 26, rd_dis : 3, alt : KEY3, dict : '', desc: Key3 or user data, rloc: EFUSE_RD_KEY3_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
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BLOCK_KEY4 : {show: y, blk : 8, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 27, rd_dis : 4, alt : KEY4, dict : '', desc: Key4 or user data, rloc: EFUSE_RD_KEY4_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
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BLOCK_KEY5 : {show: y, blk : 9, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 28, rd_dis : 5, alt : KEY5, dict : '', desc: Key5 or user data, rloc: EFUSE_RD_KEY5_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
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BLOCK_SYS_DATA2 : {show: y, blk: 10, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 29, rd_dis : 6, alt : SYS_DATA_PART2, dict : '', desc: System data part 2 (reserved), rloc: EFUSE_RD_SYS_PART2_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
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ADC2_HI_DOUT_ATTEN0 : {show: y, blk: 10, word: 0, pos : 0, len : 10, start : 0, type : 'uint:10', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: HI_DOUT of ADC2 atten0, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[9:0]', bloc: 'B0,B1[1:0]'}
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ADC2_HI_DOUT_ATTEN1 : {show: y, blk: 10, word: 0, pos: 10, len : 10, start : 10, type : 'uint:10', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: HI_DOUT of ADC2 atten1, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[19:10]', bloc: 'B1[7:2],B2[3:0]'}
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ADC2_HI_DOUT_ATTEN2 : {show: y, blk: 10, word: 0, pos: 20, len : 10, start : 20, type : 'uint:10', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: HI_DOUT of ADC2 atten2, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[29:20]', bloc: 'B2[7:4],B3[5:0]'}
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ADC2_HI_DOUT_ATTEN3 : {show: y, blk: 10, word: 0, pos: 30, len : 10, start : 30, type : 'uint:10', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: HI_DOUT of ADC2 atten3, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[31:30]', bloc: 'B3[7:6],B4'}
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ADC1_CH0_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 1, pos : 8, len : 4, start : 40, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch0 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[11:8]', bloc: 'B5[3:0]'}
|
||||
ADC1_CH1_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 1, pos: 12, len : 4, start : 44, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch1 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[15:12]', bloc: 'B5[7:4]'}
|
||||
ADC1_CH2_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 1, pos: 16, len : 4, start : 48, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch2 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[19:16]', bloc: 'B6[3:0]'}
|
||||
ADC1_CH3_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 1, pos: 20, len : 4, start : 52, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch3 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[23:20]', bloc: 'B6[7:4]'}
|
||||
ADC1_CH4_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 1, pos: 24, len : 4, start : 56, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch4 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[27:24]', bloc: 'B7[3:0]'}
|
||||
ADC1_CH5_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 1, pos: 28, len : 4, start : 60, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch5 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[31:28]', bloc: 'B7[7:4]'}
|
||||
ADC1_CH6_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos : 0, len : 4, start : 64, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch6 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[3:0]', bloc: 'B8[3:0]'}
|
||||
ADC1_CH7_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos : 4, len : 4, start : 68, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC1_ch7 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[7:4]', bloc: 'B8[7:4]'}
|
||||
ADC2_CH0_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos : 8, len : 4, start : 72, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC2_ch0 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[11:8]', bloc: 'B9[3:0]'}
|
||||
ADC2_CH1_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos: 12, len : 4, start : 76, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC2_ch1 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[15:12]', bloc: 'B9[7:4]'}
|
||||
ADC2_CH2_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos: 16, len : 4, start : 80, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC2_ch2 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[19:16]', bloc: 'B10[3:0]'}
|
||||
ADC2_CH3_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos: 20, len : 4, start : 84, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC2_ch3 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[23:20]', bloc: 'B10[7:4]'}
|
||||
ADC2_CH4_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos: 24, len : 4, start : 88, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC2_ch4 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[27:24]', bloc: 'B11[3:0]'}
|
||||
ADC2_CH5_ATTEN0_INITCODE_DIFF : {show: y, blk: 10, word: 2, pos: 28, len : 4, start : 92, type : 'uint:4', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Gap between ADC2_ch5 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[31:28]', bloc: 'B11[7:4]'}
|
||||
TEMPERATURE_SENSOR : {show: y, blk: 10, word: 3, pos : 0, len : 9, start : 96, type : 'uint:9', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Temperature calibration data, rloc: 'EFUSE_RD_SYS_PART2_DATA3_REG[8:0]', bloc: 'B12,B13[0]'}
|
||||
RESERVED_10_105 : {show: n, blk: 10, word: 3, pos : 9, len : 23, start: 105, type : 'uint:23', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART2_DATA3_REG[31:9]', bloc: 'B13[7:1],B14,B15'}
|
||||
SYS_DATA_PART2_4 : {show: n, blk: 10, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Stores the $nth 32 bits of the 2nd part of system data, rloc: EFUSE_RD_SYS_PART2_DATA4_REG, bloc: 'B16,B17,B18,B19'}
|
||||
SYS_DATA_PART2_5 : {show: n, blk: 10, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Stores the $nth 32 bits of the 2nd part of system data, rloc: EFUSE_RD_SYS_PART2_DATA5_REG, bloc: 'B20,B21,B22,B23'}
|
||||
SYS_DATA_PART2_6 : {show: n, blk: 10, word: 6, pos : 0, len : 32, start: 192, type : 'uint:32', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Stores the $nth 32 bits of the 2nd part of system data, rloc: EFUSE_RD_SYS_PART2_DATA6_REG, bloc: 'B24,B25,B26,B27'}
|
||||
SYS_DATA_PART2_7 : {show: n, blk: 10, word: 7, pos : 0, len : 32, start: 224, type : 'uint:32', wr_dis : 29, rd_dis : 6, alt : '', dict : '', desc: Stores the $nth 32 bits of the 2nd part of system data, rloc: EFUSE_RD_SYS_PART2_DATA7_REG, bloc: 'B28,B29,B30,B31'}
|
||||
|
1
test/images/efuse/256bit_3
Normal file
1
test/images/efuse/256bit_3
Normal file
@@ -0,0 +1 @@
|
||||
w<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
@@ -233,7 +233,7 @@ class TestReadCommands(EfuseTestCase):
|
||||
self.espefuse_py("burn_efuse BLK_VERSION_MAJOR 1")
|
||||
elif arg_chip in ["esp32c2", "esp32s2", "esp32c6"]:
|
||||
self.espefuse_py("burn_efuse BLK_VERSION_MINOR 1")
|
||||
elif arg_chip in ["esp32h2", "esp32h2beta1"]:
|
||||
elif arg_chip in ["esp32h2", "esp32h2beta1", "esp32p4"]:
|
||||
self.espefuse_py("burn_efuse BLK_VERSION_MINOR 2")
|
||||
self.espefuse_py("adc_info")
|
||||
|
||||
@@ -280,6 +280,9 @@ class TestReadProtectionCommands(EfuseTestCase):
|
||||
output = self.espefuse_py(cmd)
|
||||
assert count_protects == output.count("is already read protected")
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32p4", reason="BLOCK_SYS_DATA2 is used by ADC calib"
|
||||
)
|
||||
def test_read_protect_efuse2(self):
|
||||
self.espefuse_py("write_protect_efuse RD_DIS")
|
||||
if arg_chip == "esp32":
|
||||
@@ -1286,13 +1289,15 @@ class TestBurnBlockDataCommands(EfuseTestCase):
|
||||
) in output
|
||||
self.check_data_block_in_log(output, f"{IMAGES_DIR}/256bit")
|
||||
|
||||
self.espefuse_py(
|
||||
f"burn_block_data \
|
||||
BLOCK10 {IMAGES_DIR}/256bit_1"
|
||||
)
|
||||
self.check_data_block_in_log(
|
||||
self.espefuse_py("summary -d"), f"{IMAGES_DIR}/256bit_1"
|
||||
)
|
||||
if arg_chip != "esp32p4":
|
||||
# BLOCK10 is free. In P4 it is used for ADC calib data.
|
||||
self.espefuse_py(
|
||||
f"burn_block_data \
|
||||
BLOCK10 {IMAGES_DIR}/256bit_3"
|
||||
)
|
||||
self.check_data_block_in_log(
|
||||
self.espefuse_py("summary -d"), f"{IMAGES_DIR}/256bit_3"
|
||||
)
|
||||
|
||||
self.espefuse_py(
|
||||
f"burn_block_data \
|
||||
@@ -1306,7 +1311,7 @@ class TestBurnBlockDataCommands(EfuseTestCase):
|
||||
in output
|
||||
)
|
||||
self.check_data_block_in_log(output, f"{IMAGES_DIR}/256bit")
|
||||
self.check_data_block_in_log(output, f"{IMAGES_DIR}/256bit_1", 2)
|
||||
self.check_data_block_in_log(output, f"{IMAGES_DIR}/256bit_1")
|
||||
self.check_data_block_in_log(output, f"{IMAGES_DIR}/256bit_2")
|
||||
|
||||
def test_burn_block_data_check_errors(self):
|
||||
|
Reference in New Issue
Block a user