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docs(boot_mode_selection): Correct secondary strapping pin boot mode levels

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Closes https://github.com/espressif/esptool/issues/928
This commit is contained in:
radim.karnis
2023-10-25 10:40:49 +08:00
parent c8d688da78
commit 3b38e79b0e
1 changed files with 3 additions and 3 deletions
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6
docs/en/advanced-topics/boot-mode-selection.rst
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@@ -80,7 +80,7 @@ This guide explains how to select the boot mode correctly and describes the boot
{IDF_TARGET_STRAP_BOOT_2_GPIO} {IDF_TARGET_STRAP_BOOT_2_GPIO}
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
.. only:: not esp32c3 .. only:: esp32 or esp32s2 or esp32s3
{IDF_TARGET_STRAP_BOOT_2_GPIO} must also be either left unconnected/floating, or driven Low, in order to enter the serial bootloader. {IDF_TARGET_STRAP_BOOT_2_GPIO} must also be either left unconnected/floating, or driven Low, in order to enter the serial bootloader.
@@ -241,7 +241,7 @@ Depending on the kind of hardware you have, it may also be possible to manually
``boot:0xNN (DESCRIPTION)`` is the hex value of the strapping pins, as represented in the `GPIO_STRAP register <https://github.com/espressif/esp-idf/blob/release/v5.0/components/soc/{IDF_TARGET_PATH_NAME}/include/soc/gpio_reg.h>`__. ``boot:0xNN (DESCRIPTION)`` is the hex value of the strapping pins, as represented in the `GPIO_STRAP register <https://github.com/espressif/esp-idf/blob/release/v5.0/components/soc/{IDF_TARGET_PATH_NAME}/include/soc/gpio_reg.h>`__.
The individual bit values are as follows: The individual bit values are as follows:
.. only:: esp32 .. only:: esp32
- ``0x01`` - GPIO5 - ``0x01`` - GPIO5
@@ -308,7 +308,7 @@ Depending on the kind of hardware you have, it may also be possible to manually
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:1 mode:DIO, clock div:1
.. only:: not esp32 .. only:: not esp32
:: ::