docs(advanced-topics): Fixed strapping pin for Automatic Bootloader section

This commit is contained in:
Jakub Kocka
2023-11-20 13:34:37 +01:00
committed by Roland Dobai
parent cd51bbcee9
commit 590c2c6838
2 changed files with 7 additions and 1 deletions

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@@ -125,7 +125,7 @@ Automatic Bootloader
As an example of auto-reset curcuitry implementation, check the `schematic <https://dl.espressif.com/dl/schematics/esp32_devkitc_v4-sch-20180607a.pdf>`_ of the ESP32 DevKitC development board: As an example of auto-reset curcuitry implementation, check the `schematic <https://dl.espressif.com/dl/schematics/esp32_devkitc_v4-sch-20180607a.pdf>`_ of the ESP32 DevKitC development board:
- The **Micro USB 5V & USB-UART** section shows the ``DTR`` and ``RTS`` control lines of the USB to serial converter chip connected to ``GPIO0`` and ``EN`` pins of the ESP module. - The **Micro USB 5V & USB-UART** section shows the ``DTR`` and ``RTS`` control lines of the USB to serial converter chip connected to ``{IDF_TARGET_STRAP_BOOT_GPIO}`` and ``EN`` pins of the ESP module.
- Some OS and/or drivers may activate ``RTS`` and or ``DTR`` automatically when opening the serial port (true only for some serial terminal programs, not ``esptool.py``), pulling them low together and holding the ESP in reset. If ``RTS`` is wired directly to ``EN`` then RTS/CTS "hardware flow control" needs to be disabled in the serial program to avoid this. - Some OS and/or drivers may activate ``RTS`` and or ``DTR`` automatically when opening the serial port (true only for some serial terminal programs, not ``esptool.py``), pulling them low together and holding the ESP in reset. If ``RTS`` is wired directly to ``EN`` then RTS/CTS "hardware flow control" needs to be disabled in the serial program to avoid this.
An additional circuitry is implemented in order to avoid this problem - if both ``RTS`` and ``DTR`` are asserted together, this doesn't reset the chip. The schematic shows this specific circuit with two transistors and its truth table. An additional circuitry is implemented in order to avoid this problem - if both ``RTS`` and ``DTR`` are asserted together, this doesn't reset the chip. The schematic shows this specific circuit with two transistors and its truth table.
- If this circuitry is implemented (all Espressif boards have it), adding a capacitor between the ``EN`` pin and ``GND`` (in the 1uF-10uF range) is necessary for the reset circuitry to work reliably. This is shown in the **ESP32 Module** section of the schematic. - If this circuitry is implemented (all Espressif boards have it), adding a capacitor between the ``EN`` pin and ``GND`` (in the 1uF-10uF range) is necessary for the reset circuitry to work reliably. This is shown in the **ESP32 Module** section of the schematic.

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@@ -1049,6 +1049,12 @@ class TestLoadRAM(EsptoolTestCase):
def verify_output(self, expected_out: List[bytes]): def verify_output(self, expected_out: List[bytes]):
"""Verify that at least one element of expected_out is in serial output""" """Verify that at least one element of expected_out is in serial output"""
# Setting rtscts to true enables hardware flow control.
# This removes unwanted RTS logic level changes for some machines
# (and, therefore, chip resets)
# when the port is opened by the following function.
# As a result, the app loaded to RAM has a chance to run and send
# "Hello world" data without unwanted chip reset.
with serial.serial_for_url(arg_port, arg_baud, rtscts=True) as p: with serial.serial_for_url(arg_port, arg_baud, rtscts=True) as p:
p.timeout = 5 p.timeout = 5
output = p.read(100) output = p.read(100)