mirror of
https://github.com/espressif/esptool.git
synced 2025-10-19 11:43:48 +08:00
fix(ESP32-S3): Correct RTC WDT registers to fix resets during flashing
This commit is contained in:
@@ -89,7 +89,7 @@ class ESP32S3ROM(ESP32ROM):
|
||||
RTC_CNTL_SWD_WPROTECT_REG = RTCCNTL_BASE_REG + 0x00B8
|
||||
RTC_CNTL_SWD_WKEY = 0x8F1D312A
|
||||
|
||||
RTC_CNTL_WDTCONFIG0_REG = RTCCNTL_BASE_REG + 0x0090
|
||||
RTC_CNTL_WDTCONFIG0_REG = RTCCNTL_BASE_REG + 0x0098
|
||||
RTC_CNTL_WDTWPROTECT_REG = RTCCNTL_BASE_REG + 0x00B0
|
||||
RTC_CNTL_WDT_WKEY = 0x50D83AA1
|
||||
|
||||
|
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
@@ -324,7 +324,7 @@
|
||||
|
||||
#ifdef ESP32S3
|
||||
#define RTC_CNTL_OPTION1_REG (RTCCNTL_BASE_REG + 0x012C)
|
||||
#define RTC_CNTL_WDTCONFIG0_REG (RTCCNTL_BASE_REG + 0x0090) // RTC_CNTL_RTC_WDTCONFIG0_REG
|
||||
#define RTC_CNTL_WDTCONFIG0_REG (RTCCNTL_BASE_REG + 0x0098) // RTC_CNTL_RTC_WDTCONFIG0_REG
|
||||
#define RTC_CNTL_WDTWPROTECT_REG (RTCCNTL_BASE_REG + 0x00B0) // RTC_CNTL_RTC_WDTWPROTECT_REG
|
||||
#define RTC_CNTL_SWD_CONF_REG (RTCCNTL_BASE_REG + 0x00B4)
|
||||
#define RTC_CNTL_SWD_WPROTECT_REG (RTCCNTL_BASE_REG + 0x00B8)
|
||||
|
Reference in New Issue
Block a user