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feat(espefuse): Updates esp32h4 efuse table and fixes tests
- Added esp32h4 efuse table - Fixed h4 test - Enabled some tests for p4 chip.
This commit is contained in:
Konstantin Kondrashov
committed by
Chen Jichang
Chen Jichang
parent
edb99bd689
commit
777c50584d
@@ -101,7 +101,7 @@ class EspEfuses(base_fields.EspEfusesBase):
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for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
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]
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else:
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if self["BLK_VERSION_MINOR"].get() == 1:
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if False: # self["BLK_VERSION_MINOR"].get() == 1:
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self.efuses += [
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EfuseField.convert(self, efuse)
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for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
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@@ -177,11 +177,15 @@ def add_commands(subparsers, efuses):
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def burn_custom_mac(esp, efuses, args):
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print("Not supported yet")
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efuses["CUSTOM_MAC"].save(args.mac)
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if not efuses.burn_all(check_batch_mode=True):
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return
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get_custom_mac(esp, efuses, args)
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print("Successful")
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def get_custom_mac(esp, efuses, args):
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print("Not supported yet")
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print("Custom MAC Address: {}".format(efuses["CUSTOM_MAC"].get()))
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def set_flash_voltage(esp, efuses, args):
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@@ -1,97 +1,84 @@
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VER_NO: 709e8ea096e8a03a10006d40d5451a49
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VER_NO: 7bc342bad0952907e1db21112d258c6b
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EFUSES:
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WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS_REG, bloc: 'B0,B1,B2,B3'}
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WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS0_REG, bloc: 'B0,B1,B2,B3'}
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RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 7, start : 32, type : 'uint:7', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'}
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DIS_USB_JTAG : {show: y, blk : 0, word: 1, pos : 7, len : 1, start : 39, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[7]', bloc: 'B4[7]'}
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DIS_USB_SERIAL_JTAG : {show: y, blk : 0, word: 1, pos: 8, len : 1, start : 40, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'}
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DIS_FORCE_DOWNLOAD : {show: y, blk : 0, word: 1, pos: 9, len : 1, start : 41, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'}
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SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 10, len : 1, start : 42, type : bool, wr_dis : 17, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'}
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DIS_TWAI : {show: y, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis : 2, rd_dis: null, alt : DIS_CAN, dict : '', desc: 'Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'}
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JTAG_SEL_ENABLE : {show: y, blk : 0, word: 1, pos: 12, len : 1, start : 44, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'}
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DIS_PAD_JTAG : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'}
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DIS_DOWNLOAD_MANUAL_ENCRYPT : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'}
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RESERVED_RPT0_15_16 : {show: n, blk : 0, word: 1, pos: 15, len : 2, start : 47, type : 'uint:2', wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[16:15]', bloc: 'B5[7],B6[0]'}
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RESERVED_RPT0_17 : {show: n, blk : 0, word: 1, pos: 17, len : 1, start : 49, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[17]', bloc: 'B6[1]'}
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PVT_GLITCH_EN : {show: y, blk : 0, word: 1, pos: 18, len : 1, start : 50, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Represents whether to enable PVT power glitch monitor function, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18]', bloc: 'B6[2]'}
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PVT_GLITCH_CHARGE_RESET : {show: y, blk : 0, word: 1, pos: 19, len : 1, start : 51, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: Represents whether to trigger reset or charge pump when PVT power glitch happened, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'}
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PVT_GLITCH_MODE : {show: y, blk : 0, word: 1, pos: 20, len : 2, start : 52, type : 'uint:2', wr_dis : 3, rd_dis: null, alt : '', dict : '', desc: Use to configure glitch mode, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[21:20]', bloc: 'B6[5:4]'}
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DIS_CORE1 : {show: y, blk : 0, word: 1, pos: 22, len : 1, start: 54, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable core1, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[22]', bloc: 'B6[6]'}
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DIS_USB_JTAG : {show: y, blk : 0, word: 1, pos : 7, len : 1, start : 39, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[7]', bloc: 'B4[7]'}
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RESERVE_0_40 : {show: n, blk : 0, word: 1, pos : 8, len : 1, start : 40, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'}
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DIS_FORCE_DOWNLOAD : {show: y, blk : 0, word: 1, pos : 9, len : 1, start : 41, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'}
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SPI_DOWNLOAD_MSPI_DIS : {show: y, blk : 0, word: 1, pos: 10, len : 1, start : 42, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'}
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DIS_TWAI : {show: y, blk : 0, word: 1, pos: 11, len : 1, start : 43, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether TWAI function is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'}
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JTAG_SEL_ENABLE : {show: y, blk : 0, word: 1, pos: 12, len : 1, start : 44, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'}
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DIS_PAD_JTAG : {show: y, blk : 0, word: 1, pos: 13, len : 1, start : 45, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in the hard way(permanently). 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'}
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DIS_DOWNLOAD_MANUAL_ENCRYPT : {show: y, blk : 0, word: 1, pos: 14, len : 1, start : 46, type : bool, wr_dis : 2, rd_dis: null, alt : '', dict : '', desc: 'Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'}
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RESERVE_0_47 : {show: n, blk : 0, word: 1, pos: 15, len : 3, start : 47, type : 'uint:3', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[17:15]', bloc: 'B5[7],B6[1:0]'}
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PVT_GLITCH_EN : {show: y, blk : 0, word: 1, pos: 18, len : 1, start : 50, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to enable PVT power glitch monitor function.1:Enable. 0:Disable', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18]', bloc: 'B6[2]'}
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RESERVE_0_51 : {show: n, blk : 0, word: 1, pos: 19, len : 1, start : 51, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'}
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PVT_GLITCH_MODE : {show: y, blk : 0, word: 1, pos: 20, len : 2, start : 52, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Use to configure glitch mode, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[21:20]', bloc: 'B6[5:4]'}
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DIS_CORE1 : {show: y, blk : 0, word: 1, pos: 22, len : 1, start : 54, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the CPU-Core1 is disabled. 1: Disabled. 0: Not disable', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[22]', bloc: 'B6[6]'}
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SPI_BOOT_CRYPT_CNT : {show: y, blk : 0, word: 1, pos: 23, len : 3, start : 55, type : 'uint:3', wr_dis : 4, rd_dis: null, alt : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25:23]', bloc: 'B6[7],B7[1:0]'}
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SECURE_BOOT_KEY_REVOKE0 : {show: y, blk : 0, word: 1, pos: 26, len : 1, start : 58, type : bool, wr_dis : 5, rd_dis: null, alt : '', dict : '', desc: Revoke 1st secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'}
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SECURE_BOOT_KEY_REVOKE1 : {show: y, blk : 0, word: 1, pos: 27, len : 1, start : 59, type : bool, wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: Revoke 2nd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'}
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SECURE_BOOT_KEY_REVOKE2 : {show: y, blk : 0, word: 1, pos: 28, len : 1, start : 60, type : bool, wr_dis : 7, rd_dis: null, alt : '', dict : '', desc: Revoke 3rd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[27]', bloc: 'B7[3]'}
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KEY_PURPOSE_0 : {show: y, blk : 0, word: 2, pos: 0, len : 5, start : 64, type : 'uint:5', wr_dis : 8, rd_dis: null, alt : KEY0_PURPOSE, dict : '', desc: Represents the purpose of Key0, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[4:0]', bloc: 'B8[4:0]'}
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KEY_PURPOSE_1 : {show: y, blk : 0, word: 2, pos: 5, len : 5, start : 69, type : 'uint:5', wr_dis : 9, rd_dis: null, alt : KEY1_PURPOSE, dict : '', desc: Represents the purpose of Key1, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:5]', bloc: 'B8[7:5],B9[1:0]'}
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SECURE_BOOT_KEY_REVOKE0 : {show: y, blk : 0, word: 1, pos: 26, len : 1, start : 58, type : bool, wr_dis : 5, rd_dis: null, alt : '', dict : '', desc: Revoke 1st secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'}
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SECURE_BOOT_KEY_REVOKE1 : {show: y, blk : 0, word: 1, pos: 27, len : 1, start : 59, type : bool, wr_dis : 6, rd_dis: null, alt : '', dict : '', desc: Revoke 2nd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[27]', bloc: 'B7[3]'}
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SECURE_BOOT_KEY_REVOKE2 : {show: y, blk : 0, word: 1, pos: 28, len : 1, start : 60, type : bool, wr_dis : 7, rd_dis: null, alt : '', dict : '', desc: Revoke 3rd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[28]', bloc: 'B7[4]'}
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RESERVE_0_61 : {show: n, blk : 0, word: 1, pos: 29, len : 3, start : 61, type : 'uint:3', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:29]', bloc: 'B7[7:5]'}
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KEY_PURPOSE_0 : {show: y, blk : 0, word: 2, pos : 0, len : 5, start : 64, type : 'uint:5', wr_dis : 8, rd_dis: null, alt : KEY0_PURPOSE, dict : '', desc: Represents the purpose of Key0, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[4:0]', bloc: 'B8[4:0]'}
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KEY_PURPOSE_1 : {show: y, blk : 0, word: 2, pos : 5, len : 5, start : 69, type : 'uint:5', wr_dis : 9, rd_dis: null, alt : KEY1_PURPOSE, dict : '', desc: Represents the purpose of Key1, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:5]', bloc: 'B8[7:5],B9[1:0]'}
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KEY_PURPOSE_2 : {show: y, blk : 0, word: 2, pos: 10, len : 5, start : 74, type : 'uint:5', wr_dis : 10, rd_dis: null, alt : KEY2_PURPOSE, dict : '', desc: Represents the purpose of Key2, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14:10]', bloc: 'B9[6:2]'}
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KEY_PURPOSE_3 : {show: y, blk : 0, word: 2, pos: 15, len : 5, start: 79, type : 'uint:5', wr_dis : 11, rd_dis: null, alt : KEY3_PURPOSE, dict : '', desc: Represents the purpose of Key3, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[19:15]', bloc: 'B9[7],B10[3:0]'}
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KEY_PURPOSE_4 : {show: y, blk : 0, word: 2, pos: 20, len : 5, start: 84, type : 'uint:5', wr_dis : 12, rd_dis: null, alt : KEY4_PURPOSE, dict : '', desc: Represents the purpose of Key4, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[24:20]', bloc: 'B10[7:4],B11[0]'}
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KEY_PURPOSE_5 : {show: y, blk : 0, word: 2, pos: 25, len : 5, start: 89, type : 'uint:5', wr_dis : 13, rd_dis: null, alt : KEY5_PURPOSE, dict : '', desc: Represents the purpose of Key5, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[29:25]', bloc: 'B11[5:1]'}
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SEC_DPA_LEVEL : {show: y, blk : 0, word: 2, pos: 30, len : 2, start: 94, type : 'uint:2', wr_dis : 14, rd_dis: null, alt : DPA_SEC_LEVEL, dict : '', desc: Represents the spa secure level by configuring the clock random divide mode, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[31:30]', bloc: 'B11[7:6]'}
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XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 3, pos: 0, len : 2, start: 96, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[1:0]', bloc: 'B12[1:0]'}
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XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 3, pos: 2, len : 1, start: 98, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[2]', bloc: 'B12[2]'}
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ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 3, pos: 3, len : 1, start: 99, type : bool, wr_dis: 19, rd_dis: null, alt : '', dict : '', desc: 'ecc force const time', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[3]', bloc: 'B12[3]'}
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ECDSA_P384_ENABLE : {show: y, blk : 0, word: 3, pos: 4, len : 1, start: 100, type : bool, wr_dis: 19, rd_dis: null, alt : '', dict : '', desc: 'if the chip supports ECDSA P384', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[4]', bloc: 'B12[4]'}
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SECURE_BOOT_EN : {show: y, blk : 0, word: 3, pos: 5, len : 1, start: 101, type : bool, wr_dis : 15, rd_dis: null, alt : '', dict : '', desc: 'Represents whether secure boot is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[5]', bloc: 'B12[5]'}
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SECURE_BOOT_AGGRESSIVE_REVOKE : {show: y, blk : 0, word: 3, pos: 6, len : 1, start: 102, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: 'Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[6]', bloc: 'B12[6]'}
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KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 3, pos: 7, len : 5, start: 103, type : 'uint:5', wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: Represents whether the new key deployment of key manager is disabled, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[11:7]', bloc: 'B12[7],B13[3:0]'}
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KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 3, pos: 12, len : 2, start: 108, type : 'uint:2', wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: Represents the cycle at which the Key Manager switches random numbers, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[13:12]', bloc: 'B13[5:4]'}
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KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 3, pos: 14, len : 5, start: 110, type : 'uint:5', wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: Represents whether the corresponding key can be deployed only once, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[18:14]', bloc: 'B13[7:6],B14[2:0]'}
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FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 3, pos: 19, len : 5, start: 115, type : 'uint:5', wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: Represents whether the corresponding key must come from Key Manager, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23:19]', bloc: 'B14[7:3]'}
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FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 3, pos: 24, len : 1, start: 120, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: Represents whether to disable the use of the initialization key written by softw, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24]', bloc: 'B15[0]'}
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KM_XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 3, pos: 25, len : 1, start: 121, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: Represents which key flash encryption uses, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'}
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LOCK_KM_KEY : {show: y, blk : 0, word: 3, pos: 26, len : 1, start: 122, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: Represents whether the keys in the Key Manager are locked after deployment, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'}
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FLASH_TPUW : {show: y, blk : 0, word: 3, pos: 27, len : 3, start: 123, type : 'uint:3', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[29:27]', bloc: 'B15[5:3]'}
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DIS_DOWNLOAD_MODE : {show: y, blk : 0, word: 3, pos: 31, len : 1, start: 127, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether Download mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31]', bloc: 'B15[7]'}
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DIS_DIRECT_BOOT : {show: y, blk : 0, word: 4, pos: 0, len : 1, start: 128, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether direct boot mode is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'}
|
||||
DIS_USB_SERIAL_JTAG_ROM_PRINT : {show: y, blk : 0, word: 4, pos: 1, len : 1, start: 129, type : bool, wr_dis : 18, rd_dis: null, alt : DIS_USB_PRINT, dict : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'}
|
||||
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: {show: y, blk : 0, word: 4, pos: 2, len : 1, start: 130, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: disabled. 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'}
|
||||
ENABLE_SECURITY_DOWNLOAD : {show: y, blk : 0, word: 4, pos: 3, len : 1, start: 131, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether security download is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'}
|
||||
UART_PRINT_CONTROL : {show: y, blk : 0, word: 4, pos: 4, len : 2, start: 132, type : 'uint:2', wr_dis : 18, rd_dis: null, alt : '', dict: '{0: "Enable", 1: "Enable when GPIO8 is low at reset", 2: "Enable when GPIO8 is high at reset", 3: "Disable"}', desc: Set the default UARTboot message output mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5:4]', bloc: 'B16[5:4]'}
|
||||
FORCE_SEND_RESUME : {show: y, blk : 0, word: 4, pos: 6, len : 1, start: 134, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced. 0:not forced', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[6]', bloc: 'B16[6]'}
|
||||
SECURE_VERSION : {show: y, blk : 0, word: 4, pos: 7, len : 16, start: 135, type : 'uint:16', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[22:7]', bloc: 'B16[7],B17[7:0],B18[6:0]'}
|
||||
HUK_GEN_STATE : {show: y, blk : 0, word: 4, pos: 23, len : 5, start: 151, type : 'uint:5', wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: huk gen state, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[27:23]', bloc: 'B18[7],B19[3:0]'}
|
||||
FLASH_LDO_EFUSE_SEL : {show: y, blk : 0, word: 4, pos: 28, len : 1, start: 156, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the HUK generate mode is valid', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28]', bloc: 'B19[4]'}
|
||||
USB_DREFH : {show: y, blk : 0, word: 5, pos: 0, len : 2, start: 160, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB device DREFH, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[1:0]', bloc: 'B20[1:0]'}
|
||||
USB_DREFL : {show: y, blk : 0, word: 5, pos: 2, len : 2, start: 162, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB device DREFL, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[3:2]]', bloc: 'B20[3:2]'}
|
||||
USB_EXCHG_PINS : {show: y, blk : 0, word: 5, pos: 4, len : 1, start: 164, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents whether the D+ and D- pins of USB_SERIAL_JTAG PHY is exchanged, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[4]]', bloc: 'B20[4]'}
|
||||
USB_OTG_FS_DREFH : {show: y, blk : 0, word: 5, pos: 5, len : 2, start: 165, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB OTG FS DREFH, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[6:5]', bloc: 'B20[6:5]'}
|
||||
USB_OTG_FS_DREFL : {show: y, blk : 0, word: 5, pos: 7, len : 2, start: 167, type : 'uint:2', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB OTG FS DREFL, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:7]', bloc: 'B20[7],B21[0]'}
|
||||
USB_OTG_FS_EXCHG_PINS : {show: y, blk : 0, word: 5, pos: 9, len : 1, start: 169, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB OTG FS EXCHG PINS, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[9]', bloc: 'B21[1]'}
|
||||
USB_PHY_SEL : {show: y, blk : 0, word: 5, pos: 10, len : 1, start: 170, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: USB PHY SEL, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[10]', bloc: 'B21[2]'}
|
||||
MAC : {show: y, blk : 1, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 20, rd_dis: null, alt : MAC_FACTORY, dict : '', desc: MAC address, rloc: EFUSE_RD_MAC_SPI_SYS_0_REG, bloc: 'B0,B1,B2,B3,B4,B5'}
|
||||
MAC_EXT : {show: y, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'bytes:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the extended bits of MAC address, rloc: 'EFUSE_RD_MAC_SPI_SYS_1_REG[31:16]', bloc: 'B6,B7'}
|
||||
MAC_SPI_RESERVED : {show: n, blk : 1, word: 2, pos : 0, len : 14, start : 64, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved, rloc: 'EFUSE_RD_MAC_SPI_SYS_2_REG[13:0]', bloc: 'B8,B9[5:0]'}
|
||||
SPI_PAD_CONF_1 : {show: n, blk : 1, word: 2, pos: 14, len : 18, start : 78, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the first part of SPI_PAD_CONF, rloc: 'EFUSE_RD_MAC_SPI_SYS_2_REG[31:14]', bloc: 'B9[7:6],B10,B11'}
|
||||
SPI_PAD_CONF_2 : {show: n, blk : 1, word: 3, pos : 0, len : 18, start : 96, type : 'uint:18', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the second part of SPI_PAD_CONF, rloc: 'EFUSE_RD_MAC_SPI_SYS_3_REG[17:0]', bloc: 'B12,B13,B14[1:0]'}
|
||||
WAFER_VERSION_MINOR : {show: y, blk : 1, word: 3, pos: 18, len : 4, start: 114, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: '', rloc: 'EFUSE_RD_MAC_SPI_SYS_3_REG[21:18]', bloc: 'B14[5:2]'}
|
||||
WAFER_VERSION_MAJOR : {show: y, blk : 1, word: 3, pos: 22, len : 2, start: 118, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: '', rloc: 'EFUSE_RD_MAC_SPI_SYS_3_REG[23:22]', bloc: 'B14[7:6]'}
|
||||
PKG_VERSION : {show: y, blk : 1, word: 3, pos: 24, len : 3, start: 120, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SPI_SYS_3_REG[26:24]', bloc: 'B15[2:0]'}
|
||||
BLK_VERSION_MINOR : {show: y, blk : 1, word: 3, pos: 27, len : 3, start: 123, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SPI_SYS_3_REG[29:27]', bloc: 'B15[5:3]'}
|
||||
BLK_VERSION_MAJOR : {show: y, blk : 1, word: 3, pos: 30, len : 2, start: 126, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SPI_SYS_3_REG[31:30]', bloc: 'B15[7:6]'}
|
||||
FLASH_CAP : {show: y, blk : 1, word: 4, pos : 0, len : 3, start: 128, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: '', rloc: 'EFUSE_RD_MAC_SPI_SYS_4_REG[2:0]', bloc: 'B16[2:0]'}
|
||||
FLASH_TEMP : {show: y, blk : 1, word: 4, pos : 3, len : 2, start: 131, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: '', rloc: 'EFUSE_RD_MAC_SPI_SYS_4_REG[4:3]', bloc: 'B16[4:3]'}
|
||||
FLASH_VENDOR : {show: y, blk : 1, word: 4, pos : 5, len : 3, start: 133, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: '', rloc: 'EFUSE_RD_MAC_SPI_SYS_4_REG[7:5]', bloc: 'B16[7:5]'}
|
||||
RESERVED_1_136 : {show: n, blk : 1, word: 4, pos : 8, len : 24, start: 136, type : 'uint:24', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SPI_SYS_4_REG[31:8]', bloc: 'B17,B18,B19'}
|
||||
SYS_DATA_PART0_2 : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Stores the second 32 bits of the zeroth part of system data, rloc: EFUSE_RD_MAC_SPI_SYS_5_REG, bloc: 'B20,B21,B22,B23'}
|
||||
OPTIONAL_UNIQUE_ID : {show: y, blk : 2, word: 0, pos : 0, len: 128, start : 0, type: 'bytes:16', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'}
|
||||
TEMP_CALIB : {show: y, blk : 2, word: 4, pos : 0, len : 9, start: 128, type : 'uint:9', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Temperature calibration data, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[8:0]', bloc: 'B16,B17[0]'}
|
||||
OCODE : {show: y, blk : 2, word: 4, pos : 9, len : 8, start: 137, type : 'uint:8', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC OCode, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[16:9]', bloc: 'B17[7:1],B18[0]'}
|
||||
ADC1_INIT_CODE_ATTEN0 : {show: y, blk : 2, word: 4, pos: 17, len : 10, start: 145, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[26:17]', bloc: 'B18[7:1],B19[2:0]'}
|
||||
ADC1_INIT_CODE_ATTEN1 : {show: y, blk : 2, word: 4, pos: 27, len : 10, start: 155, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:27]', bloc: 'B19[7:3],B20[4:0]'}
|
||||
ADC1_INIT_CODE_ATTEN2 : {show: y, blk : 2, word: 5, pos : 5, len : 10, start: 165, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[14:5]', bloc: 'B20[7:5],B21[6:0]'}
|
||||
ADC1_INIT_CODE_ATTEN3 : {show: y, blk : 2, word: 5, pos: 15, len : 10, start: 175, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[24:15]', bloc: 'B21[7],B22,B23[0]'}
|
||||
ADC1_CAL_VOL_ATTEN0 : {show: y, blk : 2, word: 5, pos: 25, len : 10, start: 185, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 calibration voltage at atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[31:25]', bloc: 'B23[7:1],B24[2:0]'}
|
||||
ADC1_CAL_VOL_ATTEN1 : {show: y, blk : 2, word: 6, pos : 3, len : 10, start: 195, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 calibration voltage at atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[12:3]', bloc: 'B24[7:3],B25[4:0]'}
|
||||
ADC1_CAL_VOL_ATTEN2 : {show: y, blk : 2, word: 6, pos: 13, len : 10, start: 205, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 calibration voltage at atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[22:13]', bloc: 'B25[7:5],B26[6:0]'}
|
||||
ADC1_CAL_VOL_ATTEN3 : {show: y, blk : 2, word: 6, pos: 23, len : 10, start: 215, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 calibration voltage at atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[31:23]', bloc: 'B26[7],B27,B28[0]'}
|
||||
ADC1_INIT_CODE_ATTEN0_CH0 : {show: y, blk : 2, word: 7, pos : 1, len : 4, start: 225, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0 ch0, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[4:1]', bloc: 'B28[4:1]'}
|
||||
ADC1_INIT_CODE_ATTEN0_CH1 : {show: y, blk : 2, word: 7, pos : 5, len : 4, start: 229, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0 ch1, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[8:5]', bloc: 'B28[7:5],B29[0]'}
|
||||
ADC1_INIT_CODE_ATTEN0_CH2 : {show: y, blk : 2, word: 7, pos : 9, len : 4, start: 233, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0 ch2, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[12:9]', bloc: 'B29[4:1]'}
|
||||
ADC1_INIT_CODE_ATTEN0_CH3 : {show: y, blk : 2, word: 7, pos: 13, len : 4, start: 237, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0 ch3, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[16:13]', bloc: 'B29[7:5],B30[0]'}
|
||||
ADC1_INIT_CODE_ATTEN0_CH4 : {show: y, blk : 2, word: 7, pos: 17, len : 4, start: 241, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0 ch4, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[20:17]', bloc: 'B30[4:1]'}
|
||||
ADC1_INIT_CODE_ATTEN0_CH5 : {show: y, blk : 2, word: 7, pos: 21, len : 4, start: 245, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0 ch5, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[24:21]', bloc: 'B30[7:5],B31[0]'}
|
||||
ADC1_INIT_CODE_ATTEN0_CH6 : {show: y, blk : 2, word: 7, pos: 25, len : 4, start: 249, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC1 init code at atten0 ch6, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[28:25]', bloc: 'B31[4:1]'}
|
||||
RESERVED_2_253 : {show: n, blk : 2, word: 7, pos: 29, len : 3, start: 253, type : 'uint:3', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[31:29]', bloc: 'B31[7:5]'}
|
||||
KEY_PURPOSE_3 : {show: y, blk : 0, word: 2, pos: 15, len : 5, start : 79, type : 'uint:5', wr_dis : 11, rd_dis: null, alt : KEY3_PURPOSE, dict : '', desc: Represents the purpose of Key3, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[19:15]', bloc: 'B9[7],B10[3:0]'}
|
||||
KEY_PURPOSE_4 : {show: y, blk : 0, word: 2, pos: 20, len : 5, start : 84, type : 'uint:5', wr_dis : 12, rd_dis: null, alt : KEY4_PURPOSE, dict : '', desc: Represents the purpose of Key4, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[24:20]', bloc: 'B10[7:4],B11[0]'}
|
||||
KEY_PURPOSE_5 : {show: y, blk : 0, word: 2, pos: 25, len : 5, start : 89, type : 'uint:5', wr_dis : 13, rd_dis: null, alt : KEY5_PURPOSE, dict : '', desc: Represents the purpose of Key5, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[29:25]', bloc: 'B11[5:1]'}
|
||||
SEC_DPA_LEVEL : {show: y, blk : 0, word: 2, pos: 30, len : 2, start : 94, type : 'uint:2', wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: Represents the spa secure level by configuring the clock random divide mode, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[31:30]', bloc: 'B11[7:6]'}
|
||||
XTS_DPA_PSEUDO_LEVEL : {show: y, blk : 0, word: 3, pos : 0, len : 2, start : 96, type : 'uint:2', wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents the pseudo round level of xts-aes anti-dpa attack. 3: High. 2: Moderate 1. Low 0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[1:0]', bloc: 'B12[1:0]'}
|
||||
XTS_DPA_CLK_ENABLE : {show: y, blk : 0, word: 3, pos : 2, len : 1, start : 98, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether xts-aes anti-dpa attack clock is enabled. 1. Enable. 0: Disable.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[2]', bloc: 'B12[2]'}
|
||||
ECC_FORCE_CONST_TIME : {show: y, blk : 0, word: 3, pos : 3, len : 1, start : 99, type : bool, wr_dis : 14, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to force ecc to use const-time calculation mode. 1: Enable. 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[3]', bloc: 'B12[3]'}
|
||||
ECDSA_P384_ENABLE : {show: y, blk : 0, word: 3, pos : 4, len : 1, start: 100, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents if the chip supports ECDSA P384, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[4]', bloc: 'B12[4]'}
|
||||
SECURE_BOOT_EN : {show: y, blk : 0, word: 3, pos : 5, len : 1, start: 101, type : bool, wr_dis : 15, rd_dis: null, alt : '', dict : '', desc: 'Represents whether secure boot is enabled or disabled. 1: enabled 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[5]', bloc: 'B12[5]'}
|
||||
SECURE_BOOT_AGGRESSIVE_REVOKE : {show: y, blk : 0, word: 3, pos : 6, len : 1, start: 102, type : bool, wr_dis : 16, rd_dis: null, alt : '', dict : '', desc: 'Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[6]', bloc: 'B12[6]'}
|
||||
KM_DISABLE_DEPLOY_MODE : {show: y, blk : 0, word: 3, pos : 7, len : 5, start: 103, type : 'uint:5', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[11:7]', bloc: 'B12[7],B13[3:0]'}
|
||||
KM_RND_SWITCH_CYCLE : {show: y, blk : 0, word: 3, pos: 12, len : 2, start: 108, type : 'uint:2', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[13:12]', bloc: 'B13[5:4]'}
|
||||
KM_DEPLOY_ONLY_ONCE : {show: y, blk : 0, word: 3, pos: 14, len : 5, start: 110, type : 'uint:5', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[18:14]', bloc: 'B13[7:6],B14[2:0]'}
|
||||
FORCE_USE_KEY_MANAGER_KEY : {show: y, blk : 0, word: 3, pos: 19, len : 5, start: 115, type : 'uint:5', wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23:19]', bloc: 'B14[7:3]'}
|
||||
FORCE_DISABLE_SW_INIT_KEY : {show: y, blk : 0, word: 3, pos: 24, len : 1, start: 120, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24]', bloc: 'B15[0]'}
|
||||
KM_XTS_KEY_LENGTH_256 : {show: y, blk : 0, word: 3, pos: 25, len : 1, start: 121, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'}
|
||||
LOCK_KM_KEY : {show: y, blk : 0, word: 3, pos: 26, len : 1, start: 122, type : bool, wr_dis : 1, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'}
|
||||
FLASH_TPUW : {show: y, blk : 0, word: 3, pos: 27, len : 3, start: 123, type : 'uint:3', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[29:27]', bloc: 'B15[5:3]'}
|
||||
RESERVE_0_126 : {show: n, blk : 0, word: 3, pos: 30, len : 1, start: 126, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[30]', bloc: 'B15[6]'}
|
||||
DIS_DOWNLOAD_MODE : {show: y, blk : 0, word: 3, pos: 31, len : 1, start: 127, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether Download mode is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31]', bloc: 'B15[7]'}
|
||||
DIS_DIRECT_BOOT : {show: y, blk : 0, word: 4, pos : 0, len : 1, start: 128, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether direct boot mode is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'}
|
||||
DIS_USB_SERIAL_JTAG_ROM_PRINT : {show: y, blk : 0, word: 4, pos : 1, len : 1, start: 129, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'}
|
||||
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: {show: y, blk : 0, word: 4, pos : 2, len : 1, start: 130, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'}
|
||||
ENABLE_SECURITY_DOWNLOAD : {show: y, blk : 0, word: 4, pos : 3, len : 1, start: 131, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether security download is enabled or disabled. 1: enabled 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'}
|
||||
UART_PRINT_CONTROL : {show: y, blk : 0, word: 4, pos : 4, len : 2, start: 132, type : 'uint:2', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents the type of UART printing. 00: force enable printing 01: enable printing when GPIO8 is reset at low level 10: enable printing when GPIO8 is reset at high level 11: force disable printing', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5:4]', bloc: 'B16[5:4]'}
|
||||
FORCE_SEND_RESUME : {show: y, blk : 0, word: 4, pos : 6, len : 1, start: 134, type : bool, wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced 0:not forced', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[6]', bloc: 'B16[6]'}
|
||||
SECURE_VERSION : {show: y, blk : 0, word: 4, pos : 7, len : 16, start: 135, type : 'uint:16', wr_dis : 18, rd_dis: null, alt : '', dict : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[22:7]', bloc: 'B16[7],B17,B18[6:0]'}
|
||||
HUK_GEN_STATE : {show: y, blk : 0, word: 4, pos: 23, len : 5, start: 151, type : 'uint:5', wr_dis : 19, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[27:23]', bloc: 'B18[7],B19[3:0]'}
|
||||
FLASH_LDO_EFUSE_SEL : {show: y, blk : 0, word: 4, pos: 28, len : 1, start: 156, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to select efuse control flash ldo default voltage. 1 : efuse 0 : strapping', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28]', bloc: 'B19[4]'}
|
||||
RESERVE_0_157 : {show: n, blk : 0, word: 4, pos: 29, len : 3, start: 157, type : 'uint:3', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31:29]', bloc: 'B19[7:5]'}
|
||||
RESERVE_0_160 : {show: n, blk : 0, word: 5, pos : 0, len : 8, start: 160, type : 'uint:8', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[7:0]', bloc: B20}
|
||||
USB_EXCHG_PINS : {show: y, blk : 0, word: 5, pos : 8, len : 1, start: 168, type : bool, wr_dis : 30, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the D+ and D- pins of USB_SERIAL_JTAG PHY is exchanged. 1: exchanged 0: not exchanged', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8]', bloc: 'B21[0]'}
|
||||
USB_OTG_FS_EXCHG_PINS : {show: y, blk : 0, word: 5, pos : 9, len : 1, start: 169, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the D+ and D- pins of USB_OTG_FS PHY is exchanged. 1: exchanged 0: not exchanged', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[9]', bloc: 'B21[1]'}
|
||||
USB_PHY_SEL : {show: y, blk : 0, word: 5, pos: 10, len : 1, start: 170, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to exchange the USB_SERIAL_JTAG PHY with USB_OTG_FS PHY. 1: exchanged. 0: not exchanged', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[10]', bloc: 'B21[2]'}
|
||||
SOFT_DIS_JTAG : {show: y, blk : 0, word: 5, pos: 11, len : 3, start: 171, type : 'uint:3', wr_dis : 31, rd_dis: null, alt : '', dict : '', desc: 'Represents whether JTAG is disabled in soft way. Odd number: disabled Even number: enabled', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13:11]', bloc: 'B21[5:3]'}
|
||||
IO_LDO_ADJUST : {show: y, blk : 0, word: 5, pos: 14, len : 8, start: 174, type : 'uint:8', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents configuration of IO LDO mode and voltage., rloc: 'EFUSE_RD_REPEAT_DATA4_REG[21:14]', bloc: 'B21[7:6],B22[5:0]'}
|
||||
IO_LDO_1P8 : {show: y, blk : 0, word: 5, pos: 22, len : 1, start: 182, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: 'Represents select IO LDO voltage to 1.8V or 3.3V. 1: 1.8V 0: 3.3V', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[22]', bloc: 'B22[6]'}
|
||||
DCDC_CCM_EN : {show: y, blk : 0, word: 5, pos: 23, len : 1, start: 183, type : bool, wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Represents whether change DCDC to CCM mode, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[23]', bloc: 'B22[7]'}
|
||||
RESERVE_0_184 : {show: n, blk : 0, word: 5, pos: 24, len : 8, start: 184, type : 'uint:8', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:24]', bloc: B23}
|
||||
MAC : {show: y, blk : 1, word: 0, pos : 0, len : 48, start : 0, type : 'bytes:6', wr_dis : 20, rd_dis: null, alt : MAC_FACTORY, dict : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'}
|
||||
MAC_EXT : {show: y, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'bytes:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the extended bits of MAC address, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'}
|
||||
PVT_LIMIT : {show: y, blk : 1, word: 2, pos : 0, len : 16, start : 64, type : 'uint:16', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Power glitch monitor threthold, rloc: 'EFUSE_RD_MAC_SYS2_REG[15:0]', bloc: 'B8,B9'}
|
||||
PVT_CELL_SELECT : {show: y, blk : 1, word: 2, pos: 16, len : 7, start : 80, type : 'uint:7', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Power glitch monitor PVT cell select, rloc: 'EFUSE_RD_MAC_SYS2_REG[22:16]', bloc: 'B10[6:0]'}
|
||||
PVT_PUMP_LIMIT : {show: y, blk : 1, word: 2, pos: 23, len : 8, start : 87, type : 'uint:8', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Use to configure voltage monitor limit for charge pump, rloc: 'EFUSE_RD_MAC_SYS2_REG[30:23]', bloc: 'B10[7],B11[6:0]'}
|
||||
RESERVE_1_95 : {show: n, blk : 1, word: 2, pos: 31, len : 1, start : 95, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_MAC_SYS2_REG[31]', bloc: 'B11[7]'}
|
||||
PUMP_DRV : {show: y, blk : 1, word: 3, pos : 0, len : 4, start : 96, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Use to configure charge pump voltage gain, rloc: 'EFUSE_RD_MAC_SYS3_REG[3:0]', bloc: 'B12[3:0]'}
|
||||
WDT_DELAY_SEL : {show: y, blk : 1, word: 3, pos : 4, len : 2, start: 100, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: 'Represents the threshold level of the RTC watchdog STG0 timeout. 0: Original threshold configuration value of STG0 *2 1: Original threshold configuration value of STG0 *4 2: Original threshold configuration value of STG0 *8 3: Original threshold configuration value of STG0 *16 ', rloc: 'EFUSE_RD_MAC_SYS3_REG[5:4]', bloc: 'B12[5:4]'}
|
||||
HYS_EN_PAD : {show: y, blk : 1, word: 3, pos : 6, len : 1, start: 102, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: 'Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled 0:disabled', rloc: 'EFUSE_RD_MAC_SYS3_REG[6]', bloc: 'B12[6]'}
|
||||
PVT_GLITCH_CHARGE_RESET : {show: y, blk : 1, word: 3, pos : 7, len : 1, start: 103, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: 'Represents whether to trigger reset or charge pump when PVT power glitch happened.1:Trigger charge pump. 0:Trigger reset', rloc: 'EFUSE_RD_MAC_SYS3_REG[7]', bloc: 'B12[7]'}
|
||||
RESERVE_1_104 : {show: n, blk : 1, word: 3, pos : 8, len : 1, start: 104, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_MAC_SYS3_REG[8]', bloc: 'B13[0]'}
|
||||
VDD_SPI_LDO_ADJUST : {show: y, blk : 1, word: 3, pos : 9, len : 8, start: 105, type : 'uint:8', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents configuration of FLASH LDO mode and voltage., rloc: 'EFUSE_RD_MAC_SYS3_REG[16:9]', bloc: 'B13[7:1],B14[0]'}
|
||||
FLASH_LDO_POWER_SEL : {show: y, blk : 1, word: 3, pos: 17, len : 1, start: 113, type : bool, wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: 'Represents which flash ldo be select: 1: FLASH LDO 1P2 0 : FLASH LDO 1P8', rloc: 'EFUSE_RD_MAC_SYS3_REG[17]', bloc: 'B14[1]'}
|
||||
SYS_DATA_PART0_0 : {show: n, blk : 1, word: 3, pos: 18, len : 14, start: 114, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:18]', bloc: 'B14[7:2],B15'}
|
||||
SYS_DATA_PART0_1 : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS4_REG, bloc: 'B16,B17,B18,B19'}
|
||||
SYS_DATA_PART0_2 : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the second 32-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS5_REG, bloc: 'B20,B21,B22,B23'}
|
||||
SYS_DATA_PART1_0 : {show: n, blk : 2, word: 0, pos : 0, len: 256, start : 0, type: 'bytes:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
|
||||
BLOCK_USR_DATA : {show: y, blk : 3, word: 0, pos : 0, len: 192, start : 0, type: 'bytes:24', wr_dis : 22, rd_dis: null, alt : USER_DATA, dict : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'}
|
||||
RESERVED_3_192 : {show: n, blk : 3, word: 6, pos : 0, len : 8, start: 192, type : 'uint:8', wr_dis : 22, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24}
|
||||
CUSTOM_MAC : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'}
|
||||
|
||||
@@ -1182,6 +1182,8 @@ class ESP32C5BETA3FirmwareImage(ESP32C6FirmwareImage):
|
||||
|
||||
|
||||
ESP32C5BETA3ROM.BOOTLOADER_IMAGE = ESP32C5BETA3FirmwareImage
|
||||
|
||||
|
||||
class ESP32H4FirmwareImage(ESP32FirmwareImage):
|
||||
"""ESP32H4 Firmware Image almost exactly the same as ESP32FirmwareImage"""
|
||||
|
||||
|
||||
@@ -219,9 +219,6 @@ class TestReadCommands(EfuseTestCase):
|
||||
ret_code=2,
|
||||
)
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32p4", reason="No Custom MAC Address defined yet"
|
||||
)
|
||||
def test_get_custom_mac(self):
|
||||
self.espefuse_py("get_custom_mac -h")
|
||||
if arg_chip == "esp32":
|
||||
@@ -251,9 +248,6 @@ class TestReadCommands(EfuseTestCase):
|
||||
self.espefuse_py("check_error --recovery")
|
||||
|
||||
|
||||
# TODO: [ESP32H21] IDF-11506
|
||||
# TODO: [ESP32H4] IDF-12268
|
||||
@pytest.mark.skipif(arg_chip in ["esp32h21", "esp32h4"], reason="Not supported yet")
|
||||
class TestReadProtectionCommands(EfuseTestCase):
|
||||
def test_read_protect_efuse(self):
|
||||
self.espefuse_py("read_protect_efuse -h")
|
||||
@@ -338,7 +332,8 @@ class TestReadProtectionCommands(EfuseTestCase):
|
||||
else:
|
||||
key1_purpose = (
|
||||
"USER"
|
||||
if arg_chip in ["esp32p4", "esp32c61", "esp32c5", "esp32c5beta3"]
|
||||
if arg_chip
|
||||
in ["esp32p4", "esp32c61", "esp32c5", "esp32c5beta3", "esp32h4"]
|
||||
else "RESERVED"
|
||||
)
|
||||
self.espefuse_py(
|
||||
@@ -394,9 +389,6 @@ class TestReadProtectionCommands(EfuseTestCase):
|
||||
)
|
||||
|
||||
|
||||
# TODO: [ESP32H21] IDF-11506
|
||||
# TODO: [ESP32H4] IDF-12268
|
||||
@pytest.mark.skipif(arg_chip in ["esp32h21", "esp32h4"], reason="Not supported yet")
|
||||
class TestWriteProtectionCommands(EfuseTestCase):
|
||||
def test_write_protect_efuse(self):
|
||||
self.espefuse_py("write_protect_efuse -h")
|
||||
@@ -415,7 +407,7 @@ class TestWriteProtectionCommands(EfuseTestCase):
|
||||
SPI_BOOT_CRYPT_CNT"""
|
||||
efuse_lists2 = "RD_DIS KEY_PURPOSE_0 KEY_PURPOSE_2"
|
||||
else:
|
||||
efuse_lists = """RD_DIS DIS_ICACHE DIS_FORCE_DOWNLOAD
|
||||
efuse_lists = """RD_DIS DIS_FORCE_DOWNLOAD
|
||||
DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
USB_EXCHG_PINS WDT_DELAY_SEL SPI_BOOT_CRYPT_CNT
|
||||
SECURE_BOOT_KEY_REVOKE0 SECURE_BOOT_KEY_REVOKE1
|
||||
@@ -434,16 +426,18 @@ class TestWriteProtectionCommands(EfuseTestCase):
|
||||
"esp32c61",
|
||||
"esp32c5",
|
||||
"esp32c5beta3",
|
||||
"esp32h21",
|
||||
"esp32h4",
|
||||
]:
|
||||
efuse_lists += """ DIS_DOWNLOAD_ICACHE
|
||||
SPI_PAD_CONFIG_CLK SPI_PAD_CONFIG_Q
|
||||
SPI_PAD_CONFIG_D SPI_PAD_CONFIG_CS SPI_PAD_CONFIG_HD
|
||||
SPI_PAD_CONFIG_WP SPI_PAD_CONFIG_DQS SPI_PAD_CONFIG_D4
|
||||
SPI_PAD_CONFIG_D5 SPI_PAD_CONFIG_D6 SPI_PAD_CONFIG_D7"""
|
||||
efuse_lists2 = "RD_DIS DIS_ICACHE"
|
||||
efuse_lists2 = "RD_DIS"
|
||||
self.espefuse_py(f"write_protect_efuse {efuse_lists}")
|
||||
output = self.espefuse_py(f"write_protect_efuse {efuse_lists2}")
|
||||
assert output.count("is already write protected") == 2
|
||||
assert output.count("is already write protected") >= 1
|
||||
|
||||
def test_write_protect_efuse2(self):
|
||||
if arg_chip == "esp32":
|
||||
@@ -456,10 +450,6 @@ class TestWriteProtectionCommands(EfuseTestCase):
|
||||
)
|
||||
|
||||
|
||||
@pytest.mark.skipif(arg_chip == "esp32p4", reason="No Custom MAC Address defined yet")
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32h4", reason="Not supported yet"
|
||||
) # TODO: [ESP32H4] IDF-12268
|
||||
class TestBurnCustomMacCommands(EfuseTestCase):
|
||||
def test_burn_custom_mac(self):
|
||||
self.espefuse_py("burn_custom_mac -h")
|
||||
@@ -680,9 +670,6 @@ class TestValueArgForBurnEfuseCommands(EfuseTestCase):
|
||||
)
|
||||
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32h4", reason="Not supported yet"
|
||||
) # TODO: [ESP32H4] IDF-12268
|
||||
class TestBurnEfuseCommands(EfuseTestCase):
|
||||
@pytest.mark.skipif(
|
||||
arg_chip != "esp32",
|
||||
@@ -705,9 +692,6 @@ class TestBurnEfuseCommands(EfuseTestCase):
|
||||
assert "(Override SD_CMD pad (GPIO11/SPICS0)) 0b00000 -> 0b11111" in output
|
||||
assert "BURN BLOCK0 - OK (all write block bits are set)" in output
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32p4", reason="No Custom MAC Address defined yet"
|
||||
)
|
||||
def test_burn_mac_custom_efuse(self):
|
||||
crc_msg = "(OK)"
|
||||
self.espefuse_py("burn_efuse -h")
|
||||
@@ -730,12 +714,6 @@ class TestBurnEfuseCommands(EfuseTestCase):
|
||||
self.espefuse_py("burn_efuse CUSTOM_MAC AA:CD:EF:01:02:03")
|
||||
self.espefuse_py("get_custom_mac", check_msg=f"aa:cd:ef:01:02:03 {crc_msg}")
|
||||
|
||||
# TODO: [ESP32H21] IDF-11506
|
||||
# TODO: [ESP32H4] IDF-12268
|
||||
@pytest.mark.skipif(
|
||||
arg_chip in ["esp32h21", "esp32h4"],
|
||||
reason="No such eFuses, will be defined later",
|
||||
)
|
||||
def test_burn_efuse(self):
|
||||
self.espefuse_py("burn_efuse -h")
|
||||
if arg_chip == "esp32":
|
||||
@@ -762,7 +740,13 @@ class TestBurnEfuseCommands(EfuseTestCase):
|
||||
SECURE_BOOT_EN 1 \
|
||||
UART_PRINT_CONTROL 1"
|
||||
)
|
||||
if arg_chip not in ["esp32c5", "esp32c5beta3", "esp32c61"]:
|
||||
if arg_chip not in [
|
||||
"esp32c5",
|
||||
"esp32c5beta3",
|
||||
"esp32c61",
|
||||
"esp32h21",
|
||||
"esp32h4",
|
||||
]:
|
||||
# chips having the OPTIONAL_UNIQUE_ID field
|
||||
self.espefuse_py(
|
||||
"burn_efuse \
|
||||
@@ -1881,9 +1865,6 @@ class TestByteOrderBurnKeyCommand(EfuseTestCase):
|
||||
)
|
||||
|
||||
|
||||
# TODO: [ESP32H21] IDF-11506
|
||||
# TODO: [ESP32H4] IDF-12268
|
||||
@pytest.mark.skipif(arg_chip in ["esp32h21", "esp32h4"], reason="Not supported yet")
|
||||
class TestExecuteScriptsCommands(EfuseTestCase):
|
||||
@classmethod
|
||||
def setup_class(self):
|
||||
@@ -1896,7 +1877,7 @@ class TestExecuteScriptsCommands(EfuseTestCase):
|
||||
os.chdir(self.stored_dir)
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip in ["esp32c2", "esp32p4"],
|
||||
arg_chip in ["esp32c2", "esp32p4", "esp32h21", "esp32h4"],
|
||||
reason="These chips do not have eFuses used in this test",
|
||||
)
|
||||
def test_execute_scripts_with_check_that_only_one_burn(self):
|
||||
@@ -1906,7 +1887,7 @@ class TestExecuteScriptsCommands(EfuseTestCase):
|
||||
self.espefuse_py("execute_scripts execute_efuse_script2.py")
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip in ["esp32c2", "esp32p4"],
|
||||
arg_chip in ["esp32c2", "esp32p4", "esp32h21", "esp32h4"],
|
||||
reason="These chips do not have eFuses used in this test",
|
||||
)
|
||||
def test_execute_scripts_with_check(self):
|
||||
@@ -1966,9 +1947,6 @@ class TestExecuteScriptsCommands(EfuseTestCase):
|
||||
) in output
|
||||
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32h4", reason="Not supported yet"
|
||||
) # TODO: [ESP32H4] IDF-12268
|
||||
class TestMultipleCommands(EfuseTestCase):
|
||||
def test_multiple_cmds_help(self):
|
||||
if arg_chip == "esp32c2":
|
||||
@@ -2114,9 +2092,6 @@ class TestKeyPurposes(EfuseTestCase):
|
||||
)
|
||||
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32h4", reason="Not supported yet"
|
||||
) # TODO: [ESP32H4] IDF-12268
|
||||
class TestPostponedEfuses(EfuseTestCase):
|
||||
def test_postpone_efuses(self):
|
||||
if arg_chip == "esp32":
|
||||
@@ -2143,9 +2118,6 @@ class TestPostponedEfuses(EfuseTestCase):
|
||||
assert "Successful" in output
|
||||
|
||||
|
||||
@pytest.mark.skipif(
|
||||
arg_chip == "esp32h4", reason="Not supported yet"
|
||||
) # TODO: [ESP32H4] IDF-12268
|
||||
class TestCSVEfuseTable(EfuseTestCase):
|
||||
def test_extend_efuse_table_with_csv_file(self):
|
||||
csv_file = f"{IMAGES_DIR}/esp_efuse_custom_table.csv"
|
||||
|
||||
Reference in New Issue
Block a user