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feat(espefuse): Adds ADC calibration data for ESP32-C5

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This commit is contained in:
Konstantin Kondrashov
2024-09-30 18:30:06 +03:00
committed by Radim Karniš
parent 215e4b83cc
commit a9038126e2
6 changed files with 40 additions and 28 deletions
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10
espefuse/efuse/esp32c5/fields.py
View File

@@ -102,11 +102,11 @@ class EspEfuses(base_fields.EspEfusesBase):
for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
]
else:
# if self["BLK_VERSION_MINOR"].get() == 1:
# self.efuses += [
# EfuseField.convert(self, efuse)
# for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
# ]
if self.get_block_version() >= 1:
self.efuses += [
EfuseField.convert(self, efuse)
for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
]
self.efuses += [
EfuseField.convert(self, efuse) for efuse in self.Fields.CALC
]

4
espefuse/efuse/esp32c5/mem_definition.py
View File

@@ -114,12 +114,8 @@ class EfuseDefineFields(EfuseFieldsBase):
def __init__(self, extend_efuse_table) -> None:
# List of efuse fields from TRM the chapter eFuse Controller.
self.EFUSES = []
self.KEYBLOCKS = []
# if BLK_VERSION_MINOR is 1, these efuse fields are in BLOCK2
self.BLOCK2_CALIBRATION_EFUSES = []
self.CALC = []
dir_name = os.path.dirname(os.path.abspath(__file__))

6
espefuse/efuse/esp32c5/operations.py
View File

@@ -192,7 +192,11 @@ def set_flash_voltage(esp, efuses, args):
def adc_info(esp, efuses, args):
print("not supported yet")
print("Block version:", efuses.get_block_version())
if efuses.get_block_version() >= 1:
for efuse in efuses:
if efuse.category == "calibration":
print(f"{efuse.name:<30} = ", efuses[efuse.name].get())
def burn_key(esp, efuses, args, digest=None):

10
espefuse/efuse/esp32c5beta3/fields.py
View File

@@ -102,11 +102,11 @@ class EspEfuses(base_fields.EspEfusesBase):
for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
]
else:
# if self["BLK_VERSION_MINOR"].get() == 1:
# self.efuses += [
# EfuseField.convert(self, efuse)
# for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
# ]
if self.get_block_version() >= 1:
self.efuses += [
EfuseField.convert(self, efuse)
for efuse in self.Fields.BLOCK2_CALIBRATION_EFUSES
]
self.efuses += [
EfuseField.convert(self, efuse) for efuse in self.Fields.CALC
]

4
espefuse/efuse/esp32c5beta3/mem_definition.py
View File

@@ -114,12 +114,8 @@ class EfuseDefineFields(EfuseFieldsBase):
def __init__(self, extend_efuse_table) -> None:
# List of efuse fields from TRM the chapter eFuse Controller.
self.EFUSES = []
self.KEYBLOCKS = []
# if BLK_VERSION_MINOR is 1, these efuse fields are in BLOCK2
self.BLOCK2_CALIBRATION_EFUSES = []
self.CALC = []
dir_name = os.path.dirname(os.path.abspath(__file__))

34
espefuse/efuse_defs/esp32c5.yaml
View File

@@ -1,4 +1,4 @@
VER_NO: b09fa417de505238a601eddce188b696
VER_NO: 287a0ed4951aba84b9571a5f31000275
EFUSES:
WR_DIS : {show: y, blk : 0, word: 0, pos : 0, len : 32, start : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt : '', dict : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS0_REG, bloc: 'B0,B1,B2,B3'}
RD_DIS : {show: y, blk : 0, word: 1, pos : 0, len : 7, start : 32, type : 'uint:7', wr_dis : 0, rd_dis: null, alt : '', dict : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'}
@@ -80,17 +80,33 @@ EFUSES:
PA_TRIM_VERSION : {show: y, blk : 1, word: 2, pos: 29, len : 3, start : 93, type : 'uint:3', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL PA trim version, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:29]', bloc: 'B11[7:5]'}
TRIM_N_BIAS : {show: y, blk : 1, word: 3, pos : 0, len : 5, start : 96, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL N bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[4:0]', bloc: 'B12[4:0]'}
TRIM_P_BIAS : {show: y, blk : 1, word: 3, pos : 5, len : 5, start: 101, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: PADC CAL P bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[9:5]', bloc: 'B12[7:5],B13[1:0]'}
RESERVED_1_106 : {show: n, blk : 1, word: 3, pos: 10, len : 8, start: 106, type : 'uint:8', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:10]', bloc: 'B13[7:2],B14[1:0]'}
SYS_DATA_PART0_0 : {show: n, blk : 1, word: 3, pos: 18, len : 14, start: 114, type : 'uint:14', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:18]', bloc: 'B14[7:2],B15'}
SYS_DATA_PART0_1 : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS4_REG, bloc: 'B16,B17,B18,B19'}
ACTIVE_HP_DBIAS : {show: y, blk : 1, word: 3, pos: 10, len : 4, start: 106, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Active HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[13:10]', bloc: 'B13[5:2]'}
ACTIVE_LP_DBIAS : {show: y, blk : 1, word: 3, pos: 14, len : 4, start: 110, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Active LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:14]', bloc: 'B13[7:6],B14[1:0]'}
LSLP_HP_DBG : {show: y, blk : 1, word: 3, pos: 18, len : 2, start: 114, type : 'uint:2', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: LSLP HP DBG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[19:18]', bloc: 'B14[3:2]'}
LSLP_HP_DBIAS : {show: y, blk : 1, word: 3, pos: 20, len : 4, start: 116, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: LSLP HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[23:20]', bloc: 'B14[7:4]'}
DSLP_LP_DBG : {show: y, blk : 1, word: 3, pos: 24, len : 4, start: 120, type : 'uint:4', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: DSLP LP DBG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[27:24]', bloc: 'B15[3:0]'}
DSLP_LP_DBIAS : {show: y, blk : 1, word: 3, pos: 28, len : 5, start: 124, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: DSLP LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:28]', bloc: 'B15[7:4],B16[0]'}
LP_HP_DBIAS_VOL_GAP : {show: y, blk : 1, word: 4, pos : 1, len : 5, start: 129, type : 'uint:5', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: DBIAS gap between LP and HP, rloc: 'EFUSE_RD_MAC_SYS4_REG[5:1]', bloc: 'B16[5:1]'}
RESERVED_1_134 : {show: n, blk : 1, word: 4, pos : 6, len : 26, start: 134, type : 'uint:26', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS4_REG[31:6]', bloc: 'B16[7:6],B17,B18,B19'}
SYS_DATA_PART0_2 : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 20, rd_dis: null, alt : '', dict : '', desc: Represents the second 32-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS5_REG, bloc: 'B20,B21,B22,B23'}
OPTIONAL_UNIQUE_ID : {show: y, blk : 2, word: 0, pos : 0, len: 128, start : 0, type: 'bytes:16', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'}
RESERVED_2_128 : {show: n, blk : 2, word: 4, pos : 0, len : 9, start: 128, type : 'uint:9', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[8:0]', bloc: 'B16,B17[0]'}
TEMPERATURE_SENSOR : {show: y, blk : 2, word: 4, pos : 0, len : 9, start: 128, type : 'uint:9', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Temperature calibration data, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[8:0]', bloc: 'B16,B17[0]'}
OCODE : {show: y, blk : 2, word: 4, pos : 9, len : 8, start: 137, type : 'uint:8', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: ADC OCode, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[16:9]', bloc: 'B17[7:1],B18[0]'}
RESERVED_2_145 : {show: n, blk : 2, word: 4, pos: 17, len : 15, start: 145, type : 'uint:15', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:17]', bloc: 'B18[7:1],B19'}
SYS_DATA_PART1_5 : {show: n, blk : 2, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA5_REG, bloc: 'B20,B21,B22,B23'}
SYS_DATA_PART1_6 : {show: n, blk : 2, word: 6, pos : 0, len : 32, start: 192, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA6_REG, bloc: 'B24,B25,B26,B27'}
SYS_DATA_PART1_7 : {show: n, blk : 2, word: 7, pos : 0, len : 32, start: 224, type : 'uint:32', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Represents the zeroth 32-bit of first part of system data, rloc: EFUSE_RD_SYS_PART1_DATA7_REG, bloc: 'B28,B29,B30,B31'}
ADC1_AVE_INITCODE_ATTEN0 : {show: y, blk : 2, word: 4, pos: 17, len : 10, start: 145, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[26:17]', bloc: 'B18[7:1],B19[2:0]'}
ADC1_AVE_INITCODE_ATTEN1 : {show: y, blk : 2, word: 4, pos: 27, len : 10, start: 155, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:27]', bloc: 'B19[7:3],B20[4:0]'}
ADC1_AVE_INITCODE_ATTEN2 : {show: y, blk : 2, word: 5, pos : 5, len : 10, start: 165, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[14:5]', bloc: 'B20[7:5],B21[6:0]'}
ADC1_AVE_INITCODE_ATTEN3 : {show: y, blk : 2, word: 5, pos: 15, len : 10, start: 175, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[24:15]', bloc: 'B21[7],B22,B23[0]'}
ADC1_HI_DOUT_ATTEN0 : {show: y, blk : 2, word: 5, pos: 25, len : 10, start: 185, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI DOUT of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[31:25]', bloc: 'B23[7:1],B24[2:0]'}
ADC1_HI_DOUT_ATTEN1 : {show: y, blk : 2, word: 6, pos : 3, len : 10, start: 195, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI DOUT of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[12:3]', bloc: 'B24[7:3],B25[4:0]'}
ADC1_HI_DOUT_ATTEN2 : {show: y, blk : 2, word: 6, pos: 13, len : 10, start: 205, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI DOUT of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[22:13]', bloc: 'B25[7:5],B26[6:0]'}
ADC1_HI_DOUT_ATTEN3 : {show: y, blk : 2, word: 6, pos: 23, len : 10, start: 215, type : 'uint:10', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: HI DOUT of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[31:23]', bloc: 'B26[7],B27,B28[0]'}
ADC1_CH0_ATTEN0_INITCODE_DIFF : {show: y, blk : 2, word: 7, pos : 1, len : 4, start: 225, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Gap between ADC1 CH0 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[4:1]', bloc: 'B28[4:1]'}
ADC1_CH1_ATTEN0_INITCODE_DIFF : {show: y, blk : 2, word: 7, pos : 5, len : 4, start: 229, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Gap between ADC1 CH1 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[8:5]', bloc: 'B28[7:5],B29[0]'}
ADC1_CH2_ATTEN0_INITCODE_DIFF : {show: y, blk : 2, word: 7, pos : 9, len : 4, start: 233, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Gap between ADC1 CH2 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[12:9]', bloc: 'B29[4:1]'}
ADC1_CH3_ATTEN0_INITCODE_DIFF : {show: y, blk : 2, word: 7, pos: 13, len : 4, start: 237, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Gap between ADC1 CH3 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[16:13]', bloc: 'B29[7:5],B30[0]'}
ADC1_CH4_ATTEN0_INITCODE_DIFF : {show: y, blk : 2, word: 7, pos: 17, len : 4, start: 241, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Gap between ADC1 CH4 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[20:17]', bloc: 'B30[4:1]'}
ADC1_CH5_ATTEN0_INITCODE_DIFF : {show: y, blk : 2, word: 7, pos: 21, len : 4, start: 245, type : 'uint:4', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: Gap between ADC1 CH5 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[24:21]', bloc: 'B30[7:5],B31[0]'}
RESERVED_2_249 : {show: n, blk : 2, word: 7, pos: 25, len : 7, start: 249, type : 'uint:7', wr_dis : 21, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[31:25]', bloc: 'B31[7:1]'}
BLOCK_USR_DATA : {show: y, blk : 3, word: 0, pos : 0, len: 192, start : 0, type: 'bytes:24', wr_dis : 22, rd_dis: null, alt : USER_DATA, dict : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'}
RESERVED_3_192 : {show: n, blk : 3, word: 6, pos : 0, len : 8, start: 192, type : 'uint:8', wr_dis : 22, rd_dis: null, alt : '', dict : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24}
CUSTOM_MAC : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'}