feat(esp32c6 stub): Enable USB-JTAG/Serial

This commit is contained in:
radim.karnis
2022-11-24 15:48:20 +01:00
committed by Radim Karniš
parent b25606b959
commit b04cc52b5c
4 changed files with 49 additions and 32 deletions

View File

@@ -1,6 +1,6 @@
{
"entry": 1082131920,
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"entry": 1082132080,
"text": "QREixCbCBsa39wBgEUfYyzf0AGC3BIRAXECRi5HnskAiRJJEQQGCgAhAg6cEABN19Q+Cl9W3ARG3BwBgSsgDqYcAJspOxlLEBs4izLcEAGD9WTcKhEDATBN09A8N4PJAYkQjqCQBsknSREJJIkoFYYKAiECDJwoAE3X1D4KXfRTjGTT/yb83NwBgfEudi/X/NycAYHxLnYv1/4KAQREGxt03tzcAYCOmBwI3BwAImMOYQ33/yFeyQBNF9f8FiUEBgoBBEQbG2T993TcHAEC3NwBgmMM3NwBgHEP9/7JAQQGCgEERIsQ3BIVAkwfECZxLBsYmwqHPXTcxyRMExAkYSL1HgURj1ucABES9iJO0FABNP5U/HEQ3BwABE5bHAGN/5gC3BoAAmeC3BgABNzcAYFDDFMO3NgBgmEJ9/0FHkeAFRxRIupccxJmOFMiyQCJEkkRBAYKAEwcADJxBYxvlAIHnhUecwSGoI6AFAPlXPoWCgAVHY4fnAIlGY43XAP1X/beTFwUBEwewDcGH4xHl/olHyb+TB8ANYxb1AJjBkwcADPG3kwbQDf1X4xLV/JjBkwewDW2/twWFQEERk4VFCQbGUT9jSQUGtweFQJOHxwCDpgcIA9dHCBN19Q9CB0GDEwYXAEIGQYIjkscINpcjAKcAA9dHCJFnk4cHBEIHQYNjHvcCN4eEQBMHxwChZ7qXA6YHCLfGhEC3B4VAk4fHAJOGxgRjH+YAI6bHCCOg1wgjkgcIIaD5V+MG9fyyQEEBgoAjptcII6DnCN23QREGxpcAgP/ngEDmA0WFAbJAdRUTNRUAQQGCgEERBsbFNxHBDUWyQEEBFwOA/2cA499BEQbGlwCA/+eAoN3JNwHFskBBAdm/skBBAYKAQREGxhMHAAxjGuUAEwWwDdE/EwXADbJAQQHptxMHsA3jG+X+wTcTBdAN9bdBESLEJsIGxiqEswS1AGMXlACyQCJEkkRBAYKAA0UEAAUETT/ttxMFAAx5twERIsw3BIVAkwfECSbKxEcGzkrITsYTBMQJY/OVAK6EucADKUQAqokmmRNZyQAcSGNV8AAcRGNf+QKFO33dSEAmhs6FlwCA/+eAYOETdfUPAcWTB0AMXMhcQKaXXMBcRLOEl0BExPJAYkTSREJJskkFYYKAtTtlvwERBs4izBk7NwTOP2wAEwVE/5cAgP/ngIDghUcV5bJHk/cHID7GDTs3NwBgHEe3BkAAEwVE/9WPHMeyRZcAgP/ngCDeszegAPJAYkQ+hQVhgoBBEbcHhUAFRwbGI47nCJOHxwkT18UAmMcFZ30XzMPIx/mNOpWqlbGBjMsjqgcAQTcZwRMFUAyyQEEBgoB1cUrBfXMFaSLFJsPO3tLc1toGx310GpGTBwkHipcTBIT6PpSqiSKFroSXAID/54CgMpMHCQcFaoqXs4pHQbngBWeTBwcHfXSTBYT6ipcTBIT5PpSTBwcHipe+lSKFlwCA/+eA4C8ihcFFlTUBRQVjGpG6QCpEmkQKSfZZZlrWWklhgoAmiWNzmgAFaUqG1oVOhZcAgP/ngGDME3X1DwHtSobWhSKFlwCA/+eAICvKmbOEJEFptxMFMAZVvzFxfXNW01rRXs9izQbfIt0m20rZTtdS1WbLasluxwVnGpE2jBMHBwcUCDaX/Xe6lz7GI6oH+KqKLouyi7E7kwcAAhnBtwcCAD6FlwCA/+eAICSFZ2PjdxWFZBgIfXSThwQHupcTBIT6M4mHAEqFlwCA/+eAoCJ9ehgIk4cEB7qXkww6+b6ck4cEBxMNivm6l4FJPp2FZ5OHBwcYCLqXM4RHAYMtRPlj9m0LY/G5A1WgYTOmhSKFsTtBMyaGooVKhZcAgP/ngMAdppqmmWP2aQOzh7lBY/KHA7MHO0HehGPzdwG+hCaGooVWhZcAgP/ngCC7E3X1D03dhWeThwcHGAi6lzOERwEjLAT4gUSNTaMJBPhmhZcAgP/ngICpffkDRTT56oW9PmNABQLj4p3+hWcYCJOHBwe6lzOHlwBSlyMKp/iFBOm3+VfjE/X8EUfjg+T0BWcUCJMHBwd9dLaXkwWE+hMEhPk+lJMHBwe2l76VIoWXAID/54DgEn05wUUihUk5XTkRObcHAgAZ4ZMHAAI+hZcAgP/ngOAPBWMakfpQalTaVEpZulkqWppaClv6S2pM2kxKTbpNKWGCgLdXQUkZcZOH94QBRT7Oht6i3KbaytjO1tLU1tLa0N7O4szmyurI7saXAID/54DAorcHhEA3N4VAk4cHABMHh7pj5ecUJTmRRWgIMTEFObeHhECTh8cAIWc+lyMg9wi3B4BANwqEQJOHZxsjIPoAtwqFQK02k4rKABMKCgBjCwUQtwcBYEVHI6DnDIVFRUWXAID/54CgAbcFgEABRpOFBQBFRZcAgP/ngKACN/cAYBxLNwUCAJPnRwAcy5cAgP/ngKABtxcJYIhfgUU3C4VAcYlhFRM1FQCXAID/54BgqcFn/RcTBwAQhWZBZrcFAAEBRZMJywmNazcMhECXAID/54Bgn86bkwzMAIOnygj134OkygiFRyOmCggjAvECg8cUAAlHIxPhAqMC8QIC1E1HY4XnCFFHY4PnCClHY57nAIPHNAADxyQAogfZjxFHY5XnAJxEnEM+1B02oUVIEO08A8c0AIPHJACRZiIHXY+ThwYBY/jnBBMFsA1ZPBMFwA1BPBMF4A5pNN08QbcjoAcAkQdFvbcFgEABRpOFZQMVRZcAgP/ngODyNwcAYFxHEwUAApPnFxBcxxG3yUcjE/ECYb+DxxQANUZjjccsY272DhlGY4zHNmNi9ggNRmOCxxhjbPYECUZjjscmAUkTBPAPE3X0DyU8E3X5Dw08STTjFgTwg8cUAD1HY4nnRGNr9zYRR2OC51QZR2OA51YNR+OW5+6DxTQAg8ckABOFhAGiBd2NwRWBPNG9kUZjhtcklUbjldf6wUcFRWMS9xCcRNhIIyT6ACMi6gBloqVGY47XJGPs9gKdRmOK1yihRuOf1/aTB0ACYxH3HgLUHUQBRUk6AUVtMu065TqhRUgQfRTpMnX0AUkBRKm/qUZjjtckrUbjldf04UdjG/ce3EyYTNRIkEjMRIhElwCA/+eAwIMqiTM1oAAqhC230UZjgNcOY+32BMVGY4bXCGPq9gK9RmOJ1xbBRuOT1/AFRGMf9wycSBFnY2z3JsBEzEiIRDOEhwK5NCOsCQAjpIuw+aDJRmOM1xbNRuOb1+zBRwVEYxb3CsxEiESdNE2okwYgDWOJ1xJj4PYCkwYADWOK1wiTBhAN45XX6qFHYwz3CAVFKoStqJMGMA1jj9dCkwZADeOX1+iDR8sJY4AHGpxEQRcDpEkBY4TnABMEAAyBR5MG8A5jzecOA8dUAIPHRAABSSIHXY+Dx2QAwgddj4PHdADiB9mP44j25BMEEAyhtQVEEe9wEIFFAUWX8H//54CgaRHl0UVoEO/wf4kBRAFJHbUFRG3/l/B//+eAYG4zNKAA9bcDrYQAwESzZ40AE5dHATn/OTIp/UFpIp19Gf19MwWNQBnoAUWptzGBl/B//+eAAG0V/W6U5bezdyUB9fdBaTMFjUBjbokAfXkzBY1AedgxgZfwf//ngIBqEflKlPW3QYGX8H//54DAaeMSBfAzBCRB+behR+MA9+QBSRMEAAxRu8FHzb/BRwVE4xH39pxIY+/2DsxIiETpOI23M4b0AANGhgGFB7GO7b2DR8sJrc+Dp8kA7eMjDgsIA6RJAT23AUkFRRW1kUcFReMT9+qIRIFFl/B//+eAAGypt5N39wDJ/xNdRwAThIQAAUn9XeN0qd1IRJfwf//ngCBQHERYQBRAfY9jh7cBkEKTx/f/8Y9dj5jCBQlBBNm/kUepv4MlSgBBF5HlAc8BSRMEYAzdsYMnigBj5ecGk3c3AJ3/AyiKAAFGgUczBfhAs4b1AGPp5wDjAgbWIyLaACMkqgChuzOG9AAQTpEHkMIFRum/oUcFReMf994DJIoAGcATBIAMIyQKACMiCgAzNYAA1bMBSRMEIAxBsQFJEwSADKW5AUkTBJAMhblJR2OJ5xxjYvcERUfjnue2g8c0AAPHJAAThIQBogfZj5ONB/8FSYOnyQBjhQ0AmcNjRCARY1cJGBMHcAwjqukA45QHtJMHkAxZohMHIA1ji+cMEwdADeOZ57IDxDQAg8ckACIEXYyX8H//54BgTAOpyQBBFGNzJAEiieMHCbADpEkASpQxgIOnCQFjVvAAg6eJAGNQ9Arv8G/Bdd0DpUkASoaThYQBl/B//+eA4EcJxZMHQAwjqvkAg6dJAMqXI6L5AIOnyQAziSdBI6YpAZfwf//ngCBGTbwJZRMFBXEDqcQAgESX8H//54DANrcHAGDYS7cGAAHBFpNXRwESB3WPvYvZj7OHJwMBRbPVhwKX8H//54DgNxMFgD6X8H//54BgM5201EiQSMxEiETv8I/5obzv8A+8gb+3NoVAA6eGureHhECTh8cAmY8+1oOni7A3PYVAbtATDc0Jk4SGugVIY/P9AA1IQsY6xO/wj7giRzJINwWFQKKFfBCTBswAEBATBUULl/B//+eAQDiCVwMnjbCMQLON/UAdjz6UslcjJO2wKom+lYzAkwfMAJ2NAcWhZ+Oa9eZmhe/wr9QjoJQBnbXjHwnm44EHnJMHgAwjqvkAXbqcROOZB5rv8O/JCWUTBQVxl/B//+eAwCaX8H//54BAK1G6wETjCASY7/DPxxMFgD6X8H//54DAJAKUrbr2UGZU1lRGWbZZJlqWWgZb9ktmTNZMRk22TQlhgoAAAA==",
"text_start": 1082130432,
"data": "DACEQA==",
"data_start": 1082469288

View File

@@ -17,6 +17,13 @@
int uart_rx_one_char(uint8_t *ch);
uint8_t uart_rx_one_char_block();
int uart_tx_one_char(char ch);
#if ESP32C6
/* uart_tx_one_char doesn't send data to USB device serial, needs to be replaced */
int uart_tx_one_char2(char ch);
#define uart_tx_one_char(ch) uart_tx_one_char2(ch)
#endif // ESP32C6
void uart_div_modify(uint32_t uart_no, uint32_t baud_div);
int SendMsg(uint8_t *msg, uint8_t size);

View File

@@ -45,8 +45,13 @@
#define WITH_USB_OTG 1
#endif // ESP32S3
#ifdef ESP32C6
#define WITH_USB_JTAG_SERIAL 1
#define IS_RISCV 1
#endif // ESP32C6
// Increase CPU freq to speed up read/write operations over USB
#define USE_MAX_CPU_FREQ (WITH_USB_JTAG_SERIAL || WITH_USB_OTG)
#define USE_MAX_CPU_FREQ !ESP32C6 && (WITH_USB_JTAG_SERIAL || WITH_USB_OTG)
/**********************************************************
* Per-SOC based peripheral register base addresses
@@ -89,7 +94,6 @@
#define SPI_BASE_REG 0x60002000 /* SPI peripheral 1, used for SPI flash */
#define SPI0_BASE_REG 0x60003000 /* SPI peripheral 0, inner state machine */
#define GPIO_BASE_REG 0x60004000
#define RTCCNTL_BASE_REG 0x60008000
#define USB_DEVICE_BASE_REG 0x60043000
#define SYSTEM_BASE_REG 0x600C0000
#endif
@@ -99,7 +103,6 @@
#define SPI_BASE_REG 0x60002000 /* SPI peripheral 1, used for SPI flash */
#define SPI0_BASE_REG 0x60003000 /* SPI peripheral 0, inner state machine */
#define GPIO_BASE_REG 0x60004000
#define RTCCNTL_BASE_REG 0x60008000
#endif
#ifdef ESP32H2
@@ -107,22 +110,21 @@
#define SPI_BASE_REG 0x60002000 /* SPI peripheral 1, used for SPI flash */
#define SPI0_BASE_REG 0x60003000 /* SPI peripheral 0, inner state machine */
#define GPIO_BASE_REG 0x60004000
#define RTCCNTL_BASE_REG 0x60008000
#endif
#ifdef ESP32C2
#define UART_BASE_REG 0x60000000 /* UART0 */
#define SPI_BASE_REG 0x60002000 /* SPI peripheral 1, used for SPI flash */
#define SPI0_BASE_REG 0x60003000 /* SPI peripheral 0, inner state machine */
#define GPIO_BASE_REG 0x60004000
#define RTCCNTL_BASE_REG 0x60008000
#define UART_BASE_REG 0x60000000 /* UART0 */
#define SPI_BASE_REG 0x60002000 /* SPI peripheral 1, used for SPI flash */
#define SPI0_BASE_REG 0x60003000 /* SPI peripheral 0, inner state machine */
#define GPIO_BASE_REG 0x60004000
#endif
#ifdef ESP32C6
#define UART_BASE_REG 0x60000000 /* UART0 */
#define SPI_BASE_REG 0x60003000 /* SPI peripheral 1, used for SPI flash */
#define SPI0_BASE_REG 0x60002000 /* SPI peripheral 0, inner state machine */
#define GPIO_BASE_REG 0x60091000
#define UART_BASE_REG 0x60000000 /* UART0 */
#define SPI_BASE_REG 0x60003000 /* SPI peripheral 1, used for SPI flash */
#define SPI0_BASE_REG 0x60002000 /* SPI peripheral 0, inner state machine */
#define GPIO_BASE_REG 0x60091000
#define USB_DEVICE_BASE_REG 0x6000F000
#endif
/**********************************************************
@@ -236,12 +238,6 @@
#ifdef ESP32C3
#define UART_USB_JTAG_SERIAL 3
#define USB_DEVICE_INT_CLR_REG (USB_DEVICE_BASE_REG + 0x014)
#define USB_DEVICE_EP1_CONF_REG (USB_DEVICE_BASE_REG + 0x004)
#define USB_DEVICE_EP1_REG (USB_DEVICE_BASE_REG + 0x000)
#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR (1<<2)
#define USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL (1<<2)
#define DR_REG_INTERRUPT_CORE0_BASE 0x600c2000
#define INTERRUPT_CORE0_USB_INTR_MAP_REG (DR_REG_INTERRUPT_CORE0_BASE + 0x068) /* USB-JTAG-Serial */
@@ -249,18 +245,12 @@
#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA (1<<2)
#define ETS_USB_INUM 17 /* arbitrary level 1 level interrupt */
#endif
#endif // ESP32C3
#ifdef ESP32S3
#define UART_USB_OTG 3
#define UART_USB_JTAG_SERIAL 4
#define USB_DEVICE_INT_CLR_REG (USB_DEVICE_BASE_REG + 0x014)
#define USB_DEVICE_EP1_CONF_REG (USB_DEVICE_BASE_REG + 0x004)
#define USB_DEVICE_EP1_REG (USB_DEVICE_BASE_REG + 0x000)
#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR (1<<2)
#define USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL (1<<2)
#define DR_REG_INTERRUPT_CORE0_BASE 0x600c2000
#define INTERRUPT_CORE0_USB_INTR_MAP_REG (DR_REG_INTERRUPT_CORE0_BASE + 0x098) /* DWC-OTG */
#define INTERRUPT_CORE0_USB_DEVICE_INT_MAP_REG (DR_REG_INTERRUPT_CORE0_BASE + 0x180) /* USB-JTAG-Serial */
@@ -269,7 +259,27 @@
#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA (1<<2)
#define ETS_USB_INUM 17 /* arbitrary level 1 level interrupt */
#endif
#endif // ESP32S3
#ifdef ESP32C6
#define UART_USB_JTAG_SERIAL 3
#define DR_REG_INTERRUPT_MATRIX_BASE 0x60010000
#define INTERRUPT_CORE0_USB_INTR_MAP_REG (DR_REG_INTERRUPT_MATRIX_BASE + 0xC0) /* USB-JTAG-Serial, INTMTX_CORE0_USB_INT_MAP_REG */
#define USB_DEVICE_INT_ENA_REG (USB_DEVICE_BASE_REG + 0x010)
#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA (1<<2)
#define ETS_USB_INUM 17 /* arbitrary level 1 level interrupt */
#endif // ESP32C6
#ifdef WITH_USB_JTAG_SERIAL
#define USB_DEVICE_INT_CLR_REG (USB_DEVICE_BASE_REG + 0x014)
#define USB_DEVICE_EP1_CONF_REG (USB_DEVICE_BASE_REG + 0x004)
#define USB_DEVICE_EP1_REG (USB_DEVICE_BASE_REG + 0x000)
#define USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_CLR (1<<2)
#define USB_DEVICE_SERIAL_OUT_EP_DATA_AVAIL (1<<2)
#endif // WITH_USB_JTAG_SERIAL
#define USB_GAHBCFG_REG (USB_BASE_REG + 0x8)
#define USB_GLBLLNTRMSK (1 << 0)

View File

@@ -64,12 +64,12 @@ static void stub_configure_rx_uart(void)
/* All UART reads come via uart_isr or jtag_serial_isr */
#if WITH_USB_JTAG_SERIAL
if (stub_uses_usb_jtag_serial()) {
#if ESP32C3
WRITE_REG(INTERRUPT_CORE0_USB_INTR_MAP_REG, ETS_USB_INUM);
#if IS_RISCV
WRITE_REG(INTERRUPT_CORE0_USB_INTR_MAP_REG, ETS_USB_INUM); // Route USB interrupt to CPU
esprv_intc_int_set_priority(ETS_USB_INUM, 1);
#else
WRITE_REG(INTERRUPT_CORE0_USB_DEVICE_INT_MAP_REG, ETS_USB_INUM);
#endif
#endif // IS_RISCV
ets_isr_attach(ETS_USB_INUM, jtag_serial_isr, NULL);
REG_SET_MASK(USB_DEVICE_INT_ENA_REG, USB_DEVICE_SERIAL_OUT_RECV_PKT_INT_ENA);
ets_isr_unmask(1 << ETS_USB_INUM);