diff --git a/docs/en/espefuse/inc/summary_ESP32-S3.rst b/docs/en/espefuse/inc/summary_ESP32-S3.rst
index dbd4b05..68ca2a9 100644
--- a/docs/en/espefuse/inc/summary_ESP32-S3.rst
+++ b/docs/en/espefuse/inc/summary_ESP32-S3.rst
@@ -57,7 +57,7 @@
     DIS_PAD_JTAG (BLOCK0)                              Set this bit to disable JTAG in the hard way. JTAG = False R/W (0b0)
                                                         is disabled permanently
     STRAP_JTAG_SEL (BLOCK0)                            Set this bit to enable selection between usb_to_jt = False R/W (0b0)
-                                                       ag and pad_to_jtag through strapping gpio10 when b
+                                                       ag and pad_to_jtag through strapping gpio3 when b
                                                        oth reg_dis_usb_jtag and reg_dis_pad_jtag are equa
                                                        l to 0
 
diff --git a/espefuse/efuse_defs/esp32s3.yaml b/espefuse/efuse_defs/esp32s3.yaml
index 2594b3e..dcafa86 100644
--- a/espefuse/efuse_defs/esp32s3.yaml
+++ b/espefuse/efuse_defs/esp32s3.yaml
@@ -47,7 +47,7 @@ EFUSES:
   SECURE_BOOT_AGGRESSIVE_REVOKE    : {show: y, blk : 0, word: 3, pos: 21, len  : 1, start: 117, type      : bool, wr_dis  : 16, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable revoking aggressive secure boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21]', bloc: 'B14[5]'}
   DIS_USB_JTAG                     : {show: y, blk : 0, word: 3, pos: 22, len  : 1, start: 118, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable function of usb switch to jtag in module of usb device, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[22]', bloc: 'B14[6]'}
   DIS_USB_SERIAL_JTAG              : {show: y, blk : 0, word: 3, pos: 23, len  : 1, start: 119, type      : bool, wr_dis   : 2, rd_dis: null, alt                : DIS_USB_DEVICE, dict             : '', desc: Set this bit to disable usb device, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23]', bloc: 'B14[7]'}
-  STRAP_JTAG_SEL                   : {show: y, blk : 0, word: 3, pos: 24, len  : 1, start: 120, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24]', bloc: 'B15[0]'}
+  STRAP_JTAG_SEL                   : {show: y, blk : 0, word: 3, pos: 24, len  : 1, start: 120, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio3 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24]', bloc: 'B15[0]'}
   USB_PHY_SEL                      : {show: y, blk : 0, word: 3, pos: 25, len  : 1, start: 121, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "internal PHY is assigned to USB Device while external PHY is assigned to USB OTG", 1: "internal PHY is assigned to USB OTG while external PHY is assigned to USB Device"}', desc: This bit is used to switch internal PHY and external PHY for USB OTG and USB Device, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'}
   POWER_GLITCH_DSENSE              : {show: n, blk : 0, word: 3, pos: 26, len  : 2, start: 122, type  : 'uint:2', wr_dis  : 17, rd_dis: null, alt                            : '', dict             : '', desc: Sample delay configuration of power glitch, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27:26]', bloc: 'B15[3:2]'}
   FLASH_TPUW                       : {show: y, blk : 0, word: 3, pos: 28, len  : 4, start: 124, type  : 'uint:4', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value.  Otherwise; the waiting time is twice the configurable value, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'}