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183 lines
7.2 KiB
Python
183 lines
7.2 KiB
Python
# This file describes eFuses fields and registers for ESP32-P4 chip
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#
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# SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
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#
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# SPDX-License-Identifier: GPL-2.0-or-later
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import os
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import yaml
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from ..mem_definition_base import (
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EfuseBlocksBase,
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EfuseFieldsBase,
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EfuseRegistersBase,
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Field,
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)
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class EfuseDefineRegisters(EfuseRegistersBase):
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EFUSE_MEM_SIZE = 0x01FC + 4
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# EFUSE registers & command/conf values
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DR_REG_EFUSE_BASE = 0x5012D000
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EFUSE_PGM_DATA0_REG = DR_REG_EFUSE_BASE
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EFUSE_CHECK_VALUE0_REG = DR_REG_EFUSE_BASE + 0x020
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EFUSE_CLK_REG = DR_REG_EFUSE_BASE + 0x1C8
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EFUSE_CONF_REG = DR_REG_EFUSE_BASE + 0x1CC
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EFUSE_STATUS_REG = DR_REG_EFUSE_BASE + 0x1D0
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EFUSE_CMD_REG = DR_REG_EFUSE_BASE + 0x1D4
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EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0
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EFUSE_RD_RS_ERR1_REG = DR_REG_EFUSE_BASE + 0x1C4
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EFUSE_RD_REPEAT_ERR0_REG = DR_REG_EFUSE_BASE + 0x17C
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EFUSE_RD_REPEAT_ERR1_REG = DR_REG_EFUSE_BASE + 0x180
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EFUSE_RD_REPEAT_ERR2_REG = DR_REG_EFUSE_BASE + 0x184
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EFUSE_RD_REPEAT_ERR3_REG = DR_REG_EFUSE_BASE + 0x188
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EFUSE_RD_REPEAT_ERR4_REG = DR_REG_EFUSE_BASE + 0x18C
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EFUSE_DAC_CONF_REG = DR_REG_EFUSE_BASE + 0x1E8
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EFUSE_RD_TIM_CONF_REG = DR_REG_EFUSE_BASE + 0x1EC
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EFUSE_WR_TIM_CONF1_REG = DR_REG_EFUSE_BASE + 0x1F0
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EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F4
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EFUSE_DATE_REG = DR_REG_EFUSE_BASE + 0x1FC
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EFUSE_WRITE_OP_CODE = 0x5A5A
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EFUSE_READ_OP_CODE = 0x5AA5
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EFUSE_PGM_CMD_MASK = 0x3
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EFUSE_PGM_CMD = 0x2
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EFUSE_READ_CMD = 0x1
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BLOCK_ERRORS = [
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# error_reg, err_num_mask, err_num_offs, fail_bit
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(EFUSE_RD_REPEAT_ERR0_REG, None, None, None), # BLOCK0
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(EFUSE_RD_RS_ERR0_REG, 0x7, 0, 3), # MAC_SPI_8M_0
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(EFUSE_RD_RS_ERR0_REG, 0x7, 4, 7), # BLOCK_SYS_DATA
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(EFUSE_RD_RS_ERR0_REG, 0x7, 8, 11), # BLOCK_USR_DATA
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(EFUSE_RD_RS_ERR0_REG, 0x7, 12, 15), # BLOCK_KEY0
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(EFUSE_RD_RS_ERR0_REG, 0x7, 16, 19), # BLOCK_KEY1
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(EFUSE_RD_RS_ERR0_REG, 0x7, 20, 23), # BLOCK_KEY2
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(EFUSE_RD_RS_ERR0_REG, 0x7, 24, 27), # BLOCK_KEY3
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(EFUSE_RD_RS_ERR0_REG, 0x7, 28, 31), # BLOCK_KEY4
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(EFUSE_RD_RS_ERR1_REG, 0x7, 0, 3), # BLOCK_KEY5
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(EFUSE_RD_RS_ERR1_REG, 0x7, 4, 7), # BLOCK_SYS_DATA2
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]
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# EFUSE_WR_TIM_CONF2_REG
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EFUSE_PWR_OFF_NUM_S = 0
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EFUSE_PWR_OFF_NUM_M = 0xFFFF << EFUSE_PWR_OFF_NUM_S
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# EFUSE_WR_TIM_CONF1_REG
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EFUSE_PWR_ON_NUM_S = 8
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EFUSE_PWR_ON_NUM_M = 0x0000FFFF << EFUSE_PWR_ON_NUM_S
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# EFUSE_DAC_CONF_REG
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EFUSE_DAC_CLK_DIV_S = 0
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EFUSE_DAC_CLK_DIV_M = 0xFF << EFUSE_DAC_CLK_DIV_S
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# EFUSE_DAC_CONF_REG
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EFUSE_DAC_NUM_S = 9
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EFUSE_DAC_NUM_M = 0xFF << EFUSE_DAC_NUM_S
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class EfuseDefineBlocks(EfuseBlocksBase):
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__base_rd_regs = EfuseDefineRegisters.DR_REG_EFUSE_BASE
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__base_wr_regs = EfuseDefineRegisters.EFUSE_PGM_DATA0_REG
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# List of efuse blocks
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# fmt: off
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BLOCKS = [
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# Name, Alias, Index, Read address, Write address, Write protect bit, Read protect bit, Len, key_purpose
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("BLOCK0", [], 0, __base_rd_regs + 0x02C, __base_wr_regs, None, None, 6, None),
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("MAC_SPI_8M_0", ["BLOCK1"], 1, __base_rd_regs + 0x044, __base_wr_regs, 20, None, 6, None),
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("BLOCK_SYS_DATA", ["BLOCK2"], 2, __base_rd_regs + 0x05C, __base_wr_regs, 21, None, 8, None),
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("BLOCK_USR_DATA", ["BLOCK3"], 3, __base_rd_regs + 0x07C, __base_wr_regs, 22, None, 8, None),
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("BLOCK_KEY0", ["BLOCK4"], 4, __base_rd_regs + 0x09C, __base_wr_regs, 23, 0, 8, "KEY_PURPOSE_0"),
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("BLOCK_KEY1", ["BLOCK5"], 5, __base_rd_regs + 0x0BC, __base_wr_regs, 24, 1, 8, "KEY_PURPOSE_1"),
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("BLOCK_KEY2", ["BLOCK6"], 6, __base_rd_regs + 0x0DC, __base_wr_regs, 25, 2, 8, "KEY_PURPOSE_2"),
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("BLOCK_KEY3", ["BLOCK7"], 7, __base_rd_regs + 0x0FC, __base_wr_regs, 26, 3, 8, "KEY_PURPOSE_3"),
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("BLOCK_KEY4", ["BLOCK8"], 8, __base_rd_regs + 0x11C, __base_wr_regs, 27, 4, 8, "KEY_PURPOSE_4"),
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("BLOCK_KEY5", ["BLOCK9"], 9, __base_rd_regs + 0x13C, __base_wr_regs, 28, 5, 8, "KEY_PURPOSE_5"),
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("BLOCK_SYS_DATA2", ["BLOCK10"], 10, __base_rd_regs + 0x15C, __base_wr_regs, 29, 6, 8, None),
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]
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# fmt: on
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def get_burn_block_data_names(self):
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list_of_names = []
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for block in self.BLOCKS:
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blk = self.get(block)
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if blk.name:
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list_of_names.append(blk.name)
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if blk.alias:
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for alias in blk.alias:
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list_of_names.append(alias)
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return list_of_names
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class EfuseDefineFields(EfuseFieldsBase):
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def __init__(self, extend_efuse_table, revision=None) -> None:
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# List of efuse fields from TRM the chapter eFuse Controller.
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self.EFUSES = []
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self.KEYBLOCKS = []
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self.BLOCK2_CALIBRATION_EFUSES = []
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self.CALC: list = []
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dir_name = os.path.dirname(os.path.abspath(__file__))
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dir_name, file_name = os.path.split(dir_name)
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if revision is not None:
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file_name = revision
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file_name = file_name + ".yaml"
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dir_name, _ = os.path.split(dir_name)
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efuse_file = os.path.join(dir_name, "efuse_defs", file_name)
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with open(f"{efuse_file}") as r_file:
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e_desc = yaml.safe_load(r_file)
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super().__init__(e_desc, extend_efuse_table)
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for i, efuse in enumerate(self.ALL_EFUSES):
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if efuse.name in [
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"BLOCK_USR_DATA",
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"BLOCK_KEY0",
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"BLOCK_KEY1",
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"BLOCK_KEY2",
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"BLOCK_KEY3",
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"BLOCK_KEY4",
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"BLOCK_KEY5",
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"BLOCK_SYS_DATA2",
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]:
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if efuse.name == "BLOCK_USR_DATA":
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efuse.bit_len = 256
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efuse.type = "bytes:32"
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self.KEYBLOCKS.append(efuse)
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self.ALL_EFUSES[i] = None
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elif efuse.category == "calibration":
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self.BLOCK2_CALIBRATION_EFUSES.append(efuse)
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self.ALL_EFUSES[i] = None
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f = Field()
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f.name = "WAFER_VERSION_MAJOR"
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f.block = 0
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f.bit_len = 3
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f.type = f"uint:{f.bit_len}"
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f.category = "identity"
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f.class_type = "wafer"
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f.description = "calc WAFER VERSION MAJOR from (WAFER_VERSION_MAJOR_HI << 2) + WAFER_VERSION_MAJOR_LO (read only)"
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self.CALC.append(f)
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if any(
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efuse is not None
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and getattr(efuse, "name", None) == "RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1"
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for efuse in self.ALL_EFUSES
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):
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f = Field()
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f.name = "RECOVERY_BOOTLOADER_FLASH_SECTOR"
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f.block = 0
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f.bit_len = 12
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f.type = f"uint:{f.bit_len}"
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f.category = "config"
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f.class_type = "recovery_bootloader"
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f.description = "recovery_bootloader = RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1 + 2_2 + 3_6 + 7_7 + 8_10 + 11_11"
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self.CALC.append(f)
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for efuse in self.ALL_EFUSES:
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if efuse is not None:
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self.EFUSES.append(efuse)
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self.ALL_EFUSES = []
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