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https://github.com/espressif/esptool.git
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377 lines
13 KiB
Python
377 lines
13 KiB
Python
# SPDX-FileCopyrightText: 2014-2023 Fredrik Ahlberg, Angus Gratton,
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# Espressif Systems (Shanghai) CO LTD, other contributors as noted.
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#
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# SPDX-License-Identifier: GPL-2.0-or-later
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import os
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import struct
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from .esp32 import ESP32ROM
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from ..loader import ESPLoader
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from ..reset import HardReset
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from ..util import FatalError, NotImplementedInROMError
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class ESP32S3ROM(ESP32ROM):
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CHIP_NAME = "ESP32-S3"
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IMAGE_CHIP_ID = 9
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CHIP_DETECT_MAGIC_VALUE = [0x9]
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IROM_MAP_START = 0x42000000
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IROM_MAP_END = 0x44000000
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DROM_MAP_START = 0x3C000000
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DROM_MAP_END = 0x3E000000
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UART_DATE_REG_ADDR = 0x60000080
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SPI_REG_BASE = 0x60002000
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SPI_USR_OFFS = 0x18
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SPI_USR1_OFFS = 0x1C
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SPI_USR2_OFFS = 0x20
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SPI_MOSI_DLEN_OFFS = 0x24
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SPI_MISO_DLEN_OFFS = 0x28
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SPI_W0_OFFS = 0x58
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BOOTLOADER_FLASH_OFFSET = 0x0
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SUPPORTS_ENCRYPTED_FLASH = True
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FLASH_ENCRYPTED_WRITE_ALIGN = 16
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# todo: use espefuse APIs to get this info
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EFUSE_BASE = 0x60007000 # BLOCK0 read base address
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EFUSE_BLOCK1_ADDR = EFUSE_BASE + 0x44
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EFUSE_BLOCK2_ADDR = EFUSE_BASE + 0x5C
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MAC_EFUSE_REG = EFUSE_BASE + 0x044
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EFUSE_RD_REG_BASE = EFUSE_BASE + 0x030 # BLOCK0 read base address
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EFUSE_PURPOSE_KEY0_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY0_SHIFT = 24
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EFUSE_PURPOSE_KEY1_REG = EFUSE_BASE + 0x34
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EFUSE_PURPOSE_KEY1_SHIFT = 28
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EFUSE_PURPOSE_KEY2_REG = EFUSE_BASE + 0x38
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EFUSE_PURPOSE_KEY2_SHIFT = 0
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EFUSE_PURPOSE_KEY3_REG = EFUSE_BASE + 0x38
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EFUSE_PURPOSE_KEY3_SHIFT = 4
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EFUSE_PURPOSE_KEY4_REG = EFUSE_BASE + 0x38
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EFUSE_PURPOSE_KEY4_SHIFT = 8
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EFUSE_PURPOSE_KEY5_REG = EFUSE_BASE + 0x38
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EFUSE_PURPOSE_KEY5_SHIFT = 12
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EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT_REG = EFUSE_RD_REG_BASE
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EFUSE_DIS_DOWNLOAD_MANUAL_ENCRYPT = 1 << 20
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EFUSE_SPI_BOOT_CRYPT_CNT_REG = EFUSE_BASE + 0x034
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EFUSE_SPI_BOOT_CRYPT_CNT_MASK = 0x7 << 18
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EFUSE_SECURE_BOOT_EN_REG = EFUSE_BASE + 0x038
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EFUSE_SECURE_BOOT_EN_MASK = 1 << 20
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EFUSE_RD_REPEAT_DATA3_REG = EFUSE_BASE + 0x3C
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EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK = 1 << 9
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PURPOSE_VAL_XTS_AES256_KEY_1 = 2
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PURPOSE_VAL_XTS_AES256_KEY_2 = 3
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PURPOSE_VAL_XTS_AES128_KEY = 4
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UARTDEV_BUF_NO = 0x3FCEF14C # Variable in ROM .bss which indicates the port in use
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UARTDEV_BUF_NO_USB_OTG = 3 # The above var when USB-OTG is used
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UARTDEV_BUF_NO_USB_JTAG_SERIAL = 4 # The above var when USB-JTAG/Serial is used
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RTCCNTL_BASE_REG = 0x60008000
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RTC_CNTL_SWD_CONF_REG = RTCCNTL_BASE_REG + 0x00B4
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RTC_CNTL_SWD_AUTO_FEED_EN = 1 << 31
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RTC_CNTL_SWD_WPROTECT_REG = RTCCNTL_BASE_REG + 0x00B8
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RTC_CNTL_SWD_WKEY = 0x8F1D312A
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RTC_CNTL_WDTCONFIG0_REG = RTCCNTL_BASE_REG + 0x0098
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RTC_CNTL_WDTWPROTECT_REG = RTCCNTL_BASE_REG + 0x00B0
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RTC_CNTL_WDT_WKEY = 0x50D83AA1
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USB_RAM_BLOCK = 0x800 # Max block size USB-OTG is used
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GPIO_STRAP_REG = 0x60004038
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GPIO_STRAP_SPI_BOOT_MASK = 0x8 # Not download mode
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RTC_CNTL_OPTION1_REG = 0x6000812C
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RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK = 0x1 # Is download mode forced over USB?
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UART_CLKDIV_REG = 0x60000014
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MEMORY_MAP = [
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[0x00000000, 0x00010000, "PADDING"],
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[0x3C000000, 0x3D000000, "DROM"],
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[0x3D000000, 0x3E000000, "EXTRAM_DATA"],
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[0x600FE000, 0x60100000, "RTC_DRAM"],
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[0x3FC88000, 0x3FD00000, "BYTE_ACCESSIBLE"],
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[0x3FC88000, 0x403E2000, "MEM_INTERNAL"],
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[0x3FC88000, 0x3FD00000, "DRAM"],
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[0x40000000, 0x4001A100, "IROM_MASK"],
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[0x40370000, 0x403E0000, "IRAM"],
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[0x600FE000, 0x60100000, "RTC_IRAM"],
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[0x42000000, 0x42800000, "IROM"],
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[0x50000000, 0x50002000, "RTC_DATA"],
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]
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UF2_FAMILY_ID = 0xC47E5767
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def get_pkg_version(self):
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num_word = 3
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 21) & 0x07
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def is_eco0(self, minor_raw):
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# Workaround: The major version field was allocated to other purposes
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# when block version is v1.1.
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# Luckily only chip v0.0 have this kind of block version and efuse usage.
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return (
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(minor_raw & 0x7) == 0
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and self.get_blk_version_major() == 1
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and self.get_blk_version_minor() == 1
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)
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def get_minor_chip_version(self):
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minor_raw = self.get_raw_minor_chip_version()
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if self.is_eco0(minor_raw):
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return 0
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return minor_raw
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def get_raw_minor_chip_version(self):
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hi_num_word = 5
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hi = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * hi_num_word)) >> 23) & 0x01
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low_num_word = 3
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low = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * low_num_word)) >> 18) & 0x07
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return (hi << 3) + low
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def get_blk_version_major(self):
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num_word = 4
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return (self.read_reg(self.EFUSE_BLOCK2_ADDR + (4 * num_word)) >> 0) & 0x03
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def get_blk_version_minor(self):
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num_word = 3
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x07
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def get_major_chip_version(self):
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minor_raw = self.get_raw_minor_chip_version()
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if self.is_eco0(minor_raw):
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return 0
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return self.get_raw_major_chip_version()
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def get_raw_major_chip_version(self):
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num_word = 5
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 24) & 0x03
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def get_chip_description(self):
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major_rev = self.get_major_chip_version()
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minor_rev = self.get_minor_chip_version()
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pkg_version = self.get_pkg_version()
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chip_name = {
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0: "ESP32-S3 (QFN56)",
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1: "ESP32-S3-PICO-1 (LGA56)",
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}.get(pkg_version, "unknown ESP32-S3")
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return f"{chip_name} (revision v{major_rev}.{minor_rev})"
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def get_flash_cap(self):
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num_word = 3
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 27) & 0x07
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def get_flash_vendor(self):
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num_word = 4
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vendor_id = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 0) & 0x07
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return {1: "XMC", 2: "GD", 3: "FM", 4: "TT", 5: "BY"}.get(vendor_id, "")
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def get_psram_cap(self):
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num_word = 4
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return (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 3) & 0x03
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def get_psram_vendor(self):
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num_word = 4
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vendor_id = (self.read_reg(self.EFUSE_BLOCK1_ADDR + (4 * num_word)) >> 7) & 0x03
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return {1: "AP_3v3", 2: "AP_1v8"}.get(vendor_id, "")
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def get_chip_features(self):
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features = ["WiFi", "BLE"]
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flash = {
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0: None,
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1: "Embedded Flash 8MB",
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2: "Embedded Flash 4MB",
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}.get(self.get_flash_cap(), "Unknown Embedded Flash")
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if flash is not None:
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features += [flash + f" ({self.get_flash_vendor()})"]
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psram = {
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0: None,
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1: "Embedded PSRAM 8MB",
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2: "Embedded PSRAM 2MB",
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}.get(self.get_psram_cap(), "Unknown Embedded PSRAM")
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if psram is not None:
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features += [psram + f" ({self.get_psram_vendor()})"]
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return features
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def get_crystal_freq(self):
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# ESP32S3 XTAL is fixed to 40MHz
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return 40
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def get_flash_crypt_config(self):
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return None # doesn't exist on ESP32-S3
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def get_key_block_purpose(self, key_block):
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if key_block < 0 or key_block > 5:
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raise FatalError("Valid key block numbers must be in range 0-5")
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reg, shift = [
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(self.EFUSE_PURPOSE_KEY0_REG, self.EFUSE_PURPOSE_KEY0_SHIFT),
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(self.EFUSE_PURPOSE_KEY1_REG, self.EFUSE_PURPOSE_KEY1_SHIFT),
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(self.EFUSE_PURPOSE_KEY2_REG, self.EFUSE_PURPOSE_KEY2_SHIFT),
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(self.EFUSE_PURPOSE_KEY3_REG, self.EFUSE_PURPOSE_KEY3_SHIFT),
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(self.EFUSE_PURPOSE_KEY4_REG, self.EFUSE_PURPOSE_KEY4_SHIFT),
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(self.EFUSE_PURPOSE_KEY5_REG, self.EFUSE_PURPOSE_KEY5_SHIFT),
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][key_block]
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return (self.read_reg(reg) >> shift) & 0xF
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def is_flash_encryption_key_valid(self):
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# Need to see either an AES-128 key or two AES-256 keys
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purposes = [self.get_key_block_purpose(b) for b in range(6)]
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if any(p == self.PURPOSE_VAL_XTS_AES128_KEY for p in purposes):
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return True
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return any(p == self.PURPOSE_VAL_XTS_AES256_KEY_1 for p in purposes) and any(
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p == self.PURPOSE_VAL_XTS_AES256_KEY_2 for p in purposes
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)
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def get_secure_boot_enabled(self):
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return (
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self.read_reg(self.EFUSE_SECURE_BOOT_EN_REG)
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& self.EFUSE_SECURE_BOOT_EN_MASK
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)
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def override_vddsdio(self, new_voltage):
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raise NotImplementedInROMError(
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"VDD_SDIO overrides are not supported for ESP32-S3"
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)
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def read_mac(self, mac_type="BASE_MAC"):
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"""Read MAC from EFUSE region"""
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if mac_type != "BASE_MAC":
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return None
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mac0 = self.read_reg(self.MAC_EFUSE_REG)
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mac1 = self.read_reg(self.MAC_EFUSE_REG + 4) # only bottom 16 bits are MAC
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bitstring = struct.pack(">II", mac1, mac0)[2:]
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return tuple(bitstring)
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def flash_type(self):
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return (
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1
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if self.read_reg(self.EFUSE_RD_REPEAT_DATA3_REG)
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& self.EFUSE_RD_REPEAT_DATA3_REG_FLASH_TYPE_MASK
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else 0
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)
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def uses_usb_otg(self):
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"""
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Check the UARTDEV_BUF_NO register to see if USB-OTG console is being used
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"""
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if self.secure_download_mode:
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return False # can't detect native USB in secure download mode
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return self.get_uart_no() == self.UARTDEV_BUF_NO_USB_OTG
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def uses_usb_jtag_serial(self):
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"""
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Check the UARTDEV_BUF_NO register to see if USB-JTAG/Serial is being used
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"""
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if self.secure_download_mode:
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return False # can't detect USB-JTAG/Serial in secure download mode
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return self.get_uart_no() == self.UARTDEV_BUF_NO_USB_JTAG_SERIAL
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def disable_watchdogs(self):
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# When USB-JTAG/Serial is used, the RTC WDT and SWD watchdog are not reset
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# and can then reset the board during flashing. Disable them.
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if self.uses_usb_jtag_serial():
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# Disable RTC WDT
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self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, self.RTC_CNTL_WDT_WKEY)
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self.write_reg(self.RTC_CNTL_WDTCONFIG0_REG, 0)
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self.write_reg(self.RTC_CNTL_WDTWPROTECT_REG, 0)
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# Automatically feed SWD
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self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, self.RTC_CNTL_SWD_WKEY)
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self.write_reg(
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self.RTC_CNTL_SWD_CONF_REG,
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self.read_reg(self.RTC_CNTL_SWD_CONF_REG)
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| self.RTC_CNTL_SWD_AUTO_FEED_EN,
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)
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self.write_reg(self.RTC_CNTL_SWD_WPROTECT_REG, 0)
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def _post_connect(self):
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if self.uses_usb_otg():
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self.ESP_RAM_BLOCK = self.USB_RAM_BLOCK
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if not self.sync_stub_detected: # Don't run if stub is reused
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self.disable_watchdogs()
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def _check_if_can_reset(self):
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"""
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Check the strapping register to see if we can reset out of download mode.
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"""
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if os.getenv("ESPTOOL_TESTING") is not None:
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print("ESPTOOL_TESTING is set, ignoring strapping mode check")
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# Esptool tests over USB-OTG run with GPIO0 strapped low,
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# don't complain in this case.
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return
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strap_reg = self.read_reg(self.GPIO_STRAP_REG)
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force_dl_reg = self.read_reg(self.RTC_CNTL_OPTION1_REG)
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if (
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strap_reg & self.GPIO_STRAP_SPI_BOOT_MASK == 0
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and force_dl_reg & self.RTC_CNTL_FORCE_DOWNLOAD_BOOT_MASK == 0
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):
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print(
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"WARNING: {} chip was placed into download mode using GPIO0.\n"
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"esptool.py can not exit the download mode over USB. "
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"To run the app, reset the chip manually.\n"
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"To suppress this note, set --after option to 'no_reset'.".format(
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self.get_chip_description()
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)
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)
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raise SystemExit(1)
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def hard_reset(self):
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uses_usb_otg = self.uses_usb_otg()
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if uses_usb_otg:
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self._check_if_can_reset()
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print("Hard resetting via RTS pin...")
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HardReset(self._port, uses_usb_otg)()
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def change_baud(self, baud):
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ESPLoader.change_baud(self, baud)
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class ESP32S3StubLoader(ESP32S3ROM):
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"""Access class for ESP32S3 stub loader, runs on top of ROM.
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(Basically the same as ESP32StubLoader, but different base class.
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Can possibly be made into a mixin.)
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"""
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FLASH_WRITE_SIZE = 0x4000 # matches MAX_WRITE_BLOCK in stub_loader.c
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STATUS_BYTES_LENGTH = 2 # same as ESP8266, different to ESP32 ROM
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IS_STUB = True
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def __init__(self, rom_loader):
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self.secure_download_mode = rom_loader.secure_download_mode
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self._port = rom_loader._port
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self._trace_enabled = rom_loader._trace_enabled
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self.cache = rom_loader.cache
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self.flush_input() # resets _slip_reader
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if rom_loader.uses_usb_otg():
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self.ESP_RAM_BLOCK = self.USB_RAM_BLOCK
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self.FLASH_WRITE_SIZE = self.USB_RAM_BLOCK
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ESP32S3ROM.STUB_CLASS = ESP32S3StubLoader
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