fix(hcd_rp2040) assert/panic endpoint already active: when a device reset while having on-going control transfer

This commit is contained in:
hathach 2025-02-28 16:41:51 +07:00
parent a29e11404d
commit 93ff3daa11
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GPG Key ID: 26FAB84F615C3C52
2 changed files with 26 additions and 22 deletions

View File

@ -459,19 +459,23 @@ tusb_speed_t hcd_port_speed_get(uint8_t rhport)
}
// Close all opened endpoint belong to this device
void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
{
void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
pico_trace("hcd_device_close %d\n", dev_addr);
(void) rhport;
if (dev_addr == 0) return;
// reset epx if it is currently active with unplugged device
if (epx.configured && epx.active && epx.dev_addr == dev_addr) {
epx.configured = false;
*epx.endpoint_control = 0;
*epx.buffer_control = 0;
hw_endpoint_reset_transfer(&epx);
}
for (size_t i = 1; i < TU_ARRAY_SIZE(ep_pool); i++)
{
hw_endpoint_t* ep = &ep_pool[i];
if (ep->dev_addr == dev_addr && ep->configured)
{
// dev0 only has ep0
if (dev_addr != 0) {
for (size_t i = 1; i < TU_ARRAY_SIZE(ep_pool); i++) {
hw_endpoint_t *ep = &ep_pool[i];
if (ep->dev_addr == dev_addr && ep->configured) {
// in case it is an interrupt endpoint, disable it
usb_hw_clear->int_ep_ctrl = (1 << (ep->interrupt_num + 1));
usb_hw->int_ep_addr_ctrl[ep->interrupt_num] = 0;
@ -483,6 +487,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr)
hw_endpoint_reset_transfer(ep);
}
}
}
}
uint32_t hcd_frame_number(uint8_t rhport)
@ -557,7 +562,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
}
// If a normal transfer (non-interrupt) then initiate using
// sie ctrl registers. Otherwise interrupt ep registers should
// sie ctrl registers. Otherwise, interrupt ep registers should
// already be configured
if ( ep == &epx )
{
@ -597,13 +602,12 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
(void) rhport;
// Copy data into setup packet buffer
for ( uint8_t i = 0; i < 8; i++ )
{
for (uint8_t i = 0; i < 8; i++) {
usbh_dpram->setup_packet[i] = setup_packet[i];
}
// Configure EP0 struct with setup info for the trans complete
struct hw_endpoint * ep = _hw_endpoint_allocate(0);
struct hw_endpoint * ep = _hw_endpoint_allocate( (uint8_t) TUSB_XFER_CONTROL);
TU_ASSERT(ep);
// EPX should be inactive

View File

@ -110,7 +110,7 @@ void __tusb_irq_path_func(_hw_endpoint_buffer_control_update32)(struct hw_endpoi
*ep->buffer_control = value & ~USB_BUF_CTRL_AVAIL;
// 4.1.2.5.1 Con-current access: 12 cycles (should be good for 48*12Mhz = 576Mhz) after write to buffer control
// Don't need delay in host mode as host is in charge
if ( !is_host_mode()) {
if (!is_host_mode()) {
busy_wait_at_least_cycles(12);
}
}