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Jonathan Campbell
2020-08-24 12:14:54 -07:00
parent 25efc84bc8
commit 5bead8b98f
1 changed files with 80 additions and 0 deletions
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80
doc-collection/opcodes/x86/8086.dop
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@@ -254,6 +254,86 @@ common opcode "INT" param(iw) {
output order(stackdataw,stackdata16,flags);
}
common opcode "ROL" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF);
/* (dst << src) | (dst >> (regsize - src)) rotate bits left */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
common opcode "ROR" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF);
/* (dst >> src) | (dst << (regsize - src)) rotate bits right */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
common opcode "RCL" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF);
/* approx pseudocode: shift left. bits shifted out of MSB through CF and into LSB per round. */
/* tmp = dst | (CF << regsize) */
/* (tmp << src) | (tmp >> (regsize + 1 - src)) */
/* CF = tmp >> regsize */
/* dst = tmp */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
common opcode "RCR" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF);
/* approx pseudocode: shift right. bits shifted out of LSB through CF and into MSB per round. */
/* tmp = (dst << 1) | CF */
/* (tmp >> src) | (tmp << (regsize + 1 - src)) */
/* CF = tmp & 1 */
/* dst = tmp */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
common opcode "SHL" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF,SF,ZF,PF,AF);
/* dst << src */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
common opcode "SHR" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF,SF,ZF,PF,AF);
/* dst >> src */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
common opcode "SAL" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF,SF,ZF,PF,AF);
/* dst << src (same basic result as SHL) */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
common opcode "SAR" param(dst,src) {
/* NTS: Flags are not affected if src == 0 */
modifies flags(OF,CF,SF,ZF,PF,AF);
/* dst >> src with sign extend */
input dst,src; /* reads dst, src */
output dst; /* writes dst */
}
opcode sequence(0x00 mrm) name "ADD" { /* ADD r/m, reg */ common opcode "ADD" param(rmb,regb); }
opcode sequence(0x01 mrm) name "ADD" { /* ADD r/m, reg */ common opcode "ADD" param(rmw,regw); }
opcode sequence(0x02 mrm) name "ADD" { /* ADD reg, r/m */ common opcode "ADD" param(regb,rmb); }