From 9df6b8dcb75363bc1f53b02a8f4f2b9dd00773da Mon Sep 17 00:00:00 2001
From: fuel-pcbox <mszoopers@protonmail.com>
Date: Mon, 24 Mar 2025 20:03:23 -0500
Subject: [PATCH] Fix MMX PMULLW

---
 CHANGELOG                           |  4 ++--
 src/cpu/core_normal/prefix_0f_mmx.h | 18 +++++++++---------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/CHANGELOG b/CHANGELOG
index 5ad85cf87..d5967755e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -24,8 +24,8 @@ Next
   - Fixed direct input of half-width kana (maron2000)
   - Fixed PC-98 INT 1Fh, AH=90h source and destination address (drachen6jp)
   - Fixed unnecessary trailing backslash in path name (maron2000)
-  - Fixed SSE MOVSS, MOVHPS, UNPCKLPS, UNPCKHPS, and PSADBW instruction
-    implementations (fuel-pcbox)
+  - Fixed SSE MOVSS, MOVHPS, UNPCKLPS, UNPCKHPS, and PSADBW as well as
+    MMX PMULLW instruction implementations (fuel-pcbox)
 
 2025.02.01
   - Added new experimental dosbox.conf option that turns off the
diff --git a/src/cpu/core_normal/prefix_0f_mmx.h b/src/cpu/core_normal/prefix_0f_mmx.h
index 3e338a4c4..f09c06e30 100644
--- a/src/cpu/core_normal/prefix_0f_mmx.h
+++ b/src/cpu/core_normal/prefix_0f_mmx.h
@@ -1173,7 +1173,7 @@
 	}
 	CASE_0F_MMX(0x70)												/* PSHUFW Pq,Qq,imm8 */
 	{
-		if (CPU_ArchitectureType<CPU_ARCHTYPE_PMMXSLOW) goto illegal_opcode;
+		if (CPU_ArchitectureType<CPU_ARCHTYPE_PENTIUMIII) goto illegal_opcode;
 		GetRM;
 		uint8_t imm8 = Fetchb();
 		MMX_reg* dest=lookupRMregMM[rm];
@@ -1649,14 +1649,14 @@
 			GetEAa;
 			src.q = LoadMq(eaa);
 		}
-		uint32_t product0 = (uint32_t)dest->uw.w0 * (uint32_t)src.uw.w0;
-		uint32_t product1 = (uint32_t)dest->uw.w1 * (uint32_t)src.uw.w1;
-		uint32_t product2 = (uint32_t)dest->uw.w2 * (uint32_t)src.uw.w2;
-		uint32_t product3 = (uint32_t)dest->uw.w3 * (uint32_t)src.uw.w3;
-		dest->uw.w0 = (product0 & 0xffff);
-		dest->uw.w1 = (product1 & 0xffff);
-		dest->uw.w2 = (product2 & 0xffff);
-		dest->uw.w3 = (product3 & 0xffff);
+		int32_t product0 = (uint32_t)dest->sw.w0 * (uint32_t)src.sw.w0;
+		int32_t product1 = (uint32_t)dest->sw.w1 * (uint32_t)src.sw.w1;
+		int32_t product2 = (uint32_t)dest->sw.w2 * (uint32_t)src.sw.w2;
+		int32_t product3 = (uint32_t)dest->sw.w3 * (uint32_t)src.sw.w3;
+		dest->sw.w0 = product0;
+		dest->sw.w1 = product1;
+		dest->sw.w2 = product2;
+		dest->sw.w3 = product3;
 		break;
 	}
 	CASE_0F_MMX(0xd7)