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PC-98: The GDC, on the graphics plane, has an IM bit that says to increment the display address every other cycle. Implement it

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This commit is contained in:
Jonathan Campbell 2019-04-30 17:21:35 -07:00
parent 0862911aa8
commit d96e1be167
2 changed files with 5 additions and 1 deletions
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1
include/pc98_gdc.h
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@ -115,6 +115,7 @@ struct PC98_GDC_state {
bool display_enable;
bool cursor_enable;
bool cursor_blink;
bool IM_bit; /* display partition, IM bit */
bool idle;
bool doublescan; /* 200-line as 400-line */

5
src/hardware/vga_pc98_gdc.cpp
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@ -110,6 +110,7 @@ PC98_GDC_state::PC98_GDC_state() {
param_ram[2] = 0xF0; // LEN=3FF
param_ram[3] = 0x3F; // LEN=3FF WD1=0
IM_bit = false;
display_partition_mask = 3;
doublescan = false;
param_ram_wptr = 0;
@ -427,7 +428,7 @@ Bit16u PC98_GDC_state::read_fifo(void) {
void PC98_GDC_state::next_line(void) {
row_line++;
if (row_line == row_height) {
scan_address += display_pitch;
scan_address += display_pitch >> (IM_bit ? 1u : 0u);
row_line = 0;
}
else if (row_line & 0x20) {
@ -470,6 +471,7 @@ void PC98_GDC_state::load_display_partition(void) {
*
* RAM+3 = WD1 0 LEN1 (H) [5:0] */
scan_address &= 0x1FFF;
IM_bit = false;
}
else { /* graphics mode */
/* RAM+0 = SAD1 (L)
@ -479,6 +481,7 @@ void PC98_GDC_state::load_display_partition(void) {
* RAM+2 = LEN1 (L) [7:4] 0 0 SAD1 (H) [1:0]
*
* RAM+3 = WD1 IM LEN1 (H) [5:0] */
IM_bit = !!(pram[3] & 0x40); /* increment the address every other cycle if set, mixed text/graphics only */
}
}