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345 lines
10 KiB
C
345 lines
10 KiB
C
/*
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u8x8_d_ssd1363.c
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Universal 8bit Graphics Library (https://github.com/olikraus/u8g2/)
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Copyright (c) 2016, olikraus@gmail.com
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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SSD1363:
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320 x 160 dot matrix
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16 gray scale
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https://github.com/olikraus/u8g2/issues/2490
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*/
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#include "u8x8.h"
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static const uint8_t u8x8_d_ssd1363_powersave0_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0af), /* ssd1363: display on */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const uint8_t u8x8_d_ssd1363_powersave1_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_C(0x0ae), /* ssd1363: display off */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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/* interpret b as a monochrome bit pattern, write value 15 for high bit and value 0 for a low bit */
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/* topbit (msb) is sent last */
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/* example: b = 0x083 will send 0xff, 0x00, 0x00, 0xf0 */
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/*
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input:
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one tile (8 Bytes)
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output:
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Tile for SSD1363 (32 Bytes)
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*/
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static uint8_t u8x8_ssd1363_to32_dest_buf[32];
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static uint8_t *u8x8_ssd1363_8to32(U8X8_UNUSED u8x8_t *u8x8, uint8_t *ptr)
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{
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uint8_t a;
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uint8_t i;
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uint8_t *dest;
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dest = u8x8_ssd1363_to32_dest_buf;
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if ( ptr[0] == 0 && ptr[1] == 0 && ptr[2] == 0 && ptr[3] == 0 && ptr[4] == 0 && ptr[5] == 0 && ptr[6] == 0 && ptr[7] == 0 )
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{
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for( i = 0; i < 32; i++ )
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*dest++ = 0;
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return u8x8_ssd1363_to32_dest_buf;
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}
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a = 1;
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for( i = 0; i < 8; i++ )
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{
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dest[0] = 0;
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dest[1] = 0;
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dest[2] = 0;
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dest[3] = 0;
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if ( ptr[0] & a )
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dest[1] |= 0x0f;
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if ( ptr[1] & a )
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dest[1] |= 0xf0;
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if ( ptr[2] & a )
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dest[0] |= 0x0f;
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if ( ptr[3] & a )
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dest[0] |= 0xf0;
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if ( ptr[4] & a )
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dest[3] |= 0x0f;
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if ( ptr[5] & a )
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dest[3] |= 0xf0;
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if ( ptr[6] & a )
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dest[2] |= 0x0f;
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if ( ptr[7] & a )
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dest[2] |= 0xf0;
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a <<= 1;
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dest += 4;
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}
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return u8x8_ssd1363_to32_dest_buf;
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}
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uint8_t u8x8_d_ssd1363_common(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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uint8_t x;
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uint8_t y, c;
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uint8_t *ptr;
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switch(msg)
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{
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/* U8X8_MSG_DISPLAY_SETUP_MEMORY is handled by the calling function */
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/*
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case U8X8_MSG_DISPLAY_SETUP_MEMORY:
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break;
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case U8X8_MSG_DISPLAY_INIT:
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u8x8_d_helper_display_init(u8x8);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1363_256x128_init_seq);
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break;
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*/
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case U8X8_MSG_DISPLAY_SET_POWER_SAVE:
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if ( arg_int == 0 )
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1363_powersave0_seq);
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else
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1363_powersave1_seq);
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break;
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#ifdef U8X8_WITH_SET_CONTRAST
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case U8X8_MSG_DISPLAY_SET_CONTRAST:
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u8x8_cad_StartTransfer(u8x8);
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u8x8_cad_SendCmd(u8x8, 0x0C1 );
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u8x8_cad_SendArg(u8x8, arg_int ); /* ssd1363 has range from 0 to 255 */
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u8x8_cad_EndTransfer(u8x8);
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break;
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#endif
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case U8X8_MSG_DISPLAY_DRAW_TILE:
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u8x8_cad_StartTransfer(u8x8);
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x = ((u8x8_tile_t *)arg_ptr)->x_pos;
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x *= 2; // only every 4th col can be addressed
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x += u8x8->x_offset;
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y = (((u8x8_tile_t *)arg_ptr)->y_pos);
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y *= 8;
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u8x8_cad_SendCmd(u8x8, 0x075 ); /* set row address, moved out of the loop (issue 302) */
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u8x8_cad_SendArg(u8x8, y);
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u8x8_cad_SendArg(u8x8, y+7);
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do
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{
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c = ((u8x8_tile_t *)arg_ptr)->cnt;
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ptr = ((u8x8_tile_t *)arg_ptr)->tile_ptr;
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do
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{
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u8x8_cad_SendCmd(u8x8, 0x015 ); /* set column address */
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u8x8_cad_SendArg(u8x8, x ); /* start */
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u8x8_cad_SendArg(u8x8, x+1 ); /* end */
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u8x8_cad_SendCmd(u8x8, 0x05c ); /* write to ram */
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u8x8_cad_SendData(u8x8, 32, u8x8_ssd1363_8to32(u8x8, ptr));
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ptr += 8;
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x += 2;
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c--;
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} while( c > 0 );
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//x += 2;
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arg_int--;
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} while( arg_int > 0 );
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u8x8_cad_EndTransfer(u8x8);
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break;
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default:
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return 0;
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}
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return 1;
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}
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/*=========================================================*/
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static const uint8_t u8x8_d_ssd1363_256x128_flip0_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_CAA(0x0a0, 0x032, 0x000), /* remap */
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U8X8_CA(0xa2, 0x20), /* display offset, shift mapping ram counter */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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static const uint8_t u8x8_d_ssd1363_256x128_flip1_seq[] = {
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_CAA(0x0a0, 0x020, 0x000), /* remap */
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U8X8_CA(0xa2, 0x80), /* display offset, shift mapping ram counter */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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/*=========================================================*/
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/*
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https://github.com/olikraus/u8g2/issues/2490
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ZJY270S0700XG21
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*/
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static const u8x8_display_info_t u8x8_ssd1363_256x128_display_info =
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{
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/* chip_enable_level = */ 0,
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/* chip_disable_level = */ 1,
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/* post_chip_enable_wait_ns = */ 20,
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/* pre_chip_disable_wait_ns = */ 10,
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/* reset_pulse_width_ms = */ 100, /* ssd1363: 2 us */
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/* post_reset_wait_ms = */ 100, /* far east OLEDs need much longer setup time */
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/* sda_setup_time_ns = */ 50, /* 15ns, but cycle time is 100ns, so use 100/2 */
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/* sck_pulse_width_ns = */ 50, /* 20ns, but cycle time is 100ns, so use 100/2, AVR: below 70: 8 MHz, >= 70 --> 4MHz clock */
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/* sck_clock_hz = */ 4000000UL, /* since Arduino 1.6.0, the SPI bus speed in Hz. Should be 1000000000/sck_pulse_width_ns, increased to 8MHz (issue 215), 10 MHz (issue 301) */
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/* spi_mode = */ 0, /* active high, rising edge */
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/* i2c_bus_clock_100kHz = */ 4,
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/* data_setup_time_ns = */ 10,
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/* write_pulse_width_ns = */ 150, /* ssd1363: cycle time is 300ns, so use 300/2 = 150 */
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/* tile_width = */ 32, /* 256 pixel, so we require 32 bytes for this */
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/* tile_height = */ 16,
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/* default_x_offset = */ 8, /* this is the byte offset (there are two pixel per byte with 4 bit per pixel) */
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/* flipmode_x_offset = */ 8,
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/* pixel_width = */ 256,
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/* pixel_height = */ 128
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};
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static const uint8_t u8x8_d_ssd1363_256x128_init_seq[] = {
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U8X8_DLY(1),
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U8X8_START_TRANSFER(), /* enable chip, delay is part of the transfer start */
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U8X8_DLY(1),
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U8X8_CA(0xfd, 0x12), /* unlock */
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U8X8_C(0xae), /* display off */
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U8X8_CA(0xb3, 0x30), /* clock divide ratio/oscillator frequency (midas: 0x30 ) */
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U8X8_CA(0xca, 127), /* multiplex ratio (3..159) */
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U8X8_CA(0xa2, 0x20), /* display offset, shift mapping ram counter */
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U8X8_CA(0xa1, 0x00), /* display start line */
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//U8X8_CA(0xab, 0x01), /* Enable Internal VDD Regulator */
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/*
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A[0]=0b, Horizontal address increment [reset] ***
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A[0]=1b, Vertical address increment
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A[1]=0b, Disable Column Address Re-map [reset]
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A[1]=1b, Enable Column Address Re-map ***
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A[4]=0b, Scan from COM0 to COM[N –1] [reset]
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A[4]=1b, Scan from COM[N-1] to COM0, where N is the ***
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Multiplex ratio
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A[5]=0b, Disable COM Split Odd Even [reset] ***
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A[5]=1b, Enable COM Split Odd Even
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B[4], Enable / disable Dual COM Line mode
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0b, Disable Dual COM mode [reset]
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1b, Enable Dual COM mode (MUX ≤ 79)
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0x16 = 00010110
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*/
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U8X8_CAA(0xa0, 0x32, 0x000), /* Set Re-Map / Dual COM Line Mode (midas datasheet) */
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U8X8_CAA(0xb4, 0x32, 0x00c), /* Display Enhancement A (midas datasheet) NOT DOCUMENTED */
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//U8X8_CA(0xc7, 0x0f), /* Set Scale Factor of Segment Output Current Control */
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U8X8_CA(0xc1, 0xff), /* contrast */
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U8X8_CA(0xba, 0x03), /* voltage config: Vp pin is connected to cap */
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U8X8_C(0xb9), /* linear grayscale */
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U8X8_CA(0xad, 0x90), /* internal IREF: 0x90, external IREF: 0x80 */
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U8X8_CA(0xb1, 0x74), /* Phase 1 (Reset) & Phase 2 (Pre-Charge) Period Adjustment (midas) */
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U8X8_CA(0xbb, 0x0c), /* precharge voltage */
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U8X8_CA(0xb6, 0xc8), /* second pre charge (midas) */
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U8X8_CA(0xbe, 0x04), /* vcomh (midas) */
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U8X8_C(0xa6), /* normal display */
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U8X8_C(0xa9), /* exit partial display */
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U8X8_DLY(1), /* delay 2ms */
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U8X8_END_TRANSFER(), /* disable chip */
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U8X8_END() /* end of sequence */
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};
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uint8_t u8x8_d_ssd1363_256x128(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
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{
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switch(msg)
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{
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case U8X8_MSG_DISPLAY_SETUP_MEMORY:
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u8x8_d_helper_display_setup_memory(u8x8, &u8x8_ssd1363_256x128_display_info);
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break;
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case U8X8_MSG_DISPLAY_INIT:
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u8x8_d_helper_display_init(u8x8);
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1363_256x128_init_seq);
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break;
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case U8X8_MSG_DISPLAY_SET_FLIP_MODE:
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if ( arg_int == 0 )
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{
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1363_256x128_flip0_seq);
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u8x8->x_offset = u8x8->display_info->default_x_offset;
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}
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else
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{
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u8x8_cad_SendSequence(u8x8, u8x8_d_ssd1363_256x128_flip1_seq);
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u8x8->x_offset = u8x8->display_info->flipmode_x_offset;
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}
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break;
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default:
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return u8x8_d_ssd1363_common(u8x8, msg, arg_int, arg_ptr);
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}
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return 1;
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}
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