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ARM Simulator - Oops. We never enabled conditional execution of instructions.

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Apparently we rarely use that feature.


git-svn-id: svn://coreboot.org/openfirmware@3789 1552c027-8020-0410-b4b5-a757f869b4ce
This commit is contained in:
Mike Tuciarone 2015-12-18 19:09:57 +00:00
parent f0d13a7cc3
commit d5cc657ce8
1 changed files with 4 additions and 0 deletions
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4
cpu/arm/armsim.c
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@ -343,6 +343,9 @@ simulate(u8 *mem, u32 start, u32 header, u32 syscall_vec,
regdump(instruction, last_pc, 0);
//#endif
EVAL_COND(COND);
if (cond == 0) {
goto annul;
}
if (cond == 0xf)
UNIMP("unconditional");
switch (OP) {
@ -1283,6 +1286,7 @@ case 0x7d:
case 0x7e:
case 0x7f: UNIMP("svc"); break;
} // switch (OP)
annul:
if (PC == last_pc)
PC += 4;
else // branch or move