diff --git a/testing/examples/SAM7S256Test/results/607.html b/testing/examples/SAM7S256Test/results/607.html new file mode 100644 index 000000000..570b3b344 --- /dev/null +++ b/testing/examples/SAM7S256Test/results/607.html @@ -0,0 +1,698 @@ + + +Test results for revision 607 + + + +

Test cases

+

Test case results

+The test results are stored in seperate documents. One document for +each subversion number. + + + + +
Test resultscomment
607
templateTest results template
+ +

SAM7S64

+ +

Connectivity

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputActual outputPass/Fail
CON001SAM7S64ZY1000Telnet connectionPower on, jtag target attachedOn console, type
telnet ip port		Open On-Chip Debugger
>		Open On-Chip Debugger
>		PASS
CON002SAM7S64ZY1000GDB server connectionPower on, jtag target attachedOn GDB console, type
target remote ip:port		Remote debugging using 10.0.0.73:3333Remote debugging using 10.0.0.73:3333PASS
+ +

Reset

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputActual outputPass/Fail
RES001SAM7S64ZY1000Reset halt on a blank targetErase all the content of the flashConnect via the telnet interface and type
reset halt		Reset should return without error and the output should contain
target state: halted
pc = 0		 + + JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
+ nSRST pulls nTRST, falling back to "reset run_and_halt"
+ target state: halted
+ target halted in ARM state due to debug request, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x00100178 + + 		PASS
RES002SAM7S64ZY1000Reset init on a blank targetErase all the content of the flashConnect via the telnet interface and type
reset init		Reset should return without error and the output should contain
executing reset script 'name_of_the_script'		 + + JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
+ nSRST pulls nTRST, falling back to "reset run_and_init"
+ target state: halted
+ target halted in ARM state due to debug request, current mode: Supervisor
+ cpsr: 0x600000d3 pc: 0x00003e24
+ executing reset script 'event/sam7s256_reset.script' + + 		PASS
RES003SAM7S64ZY1000Reset after a power cycle of the targetReset the target then power cycle the targetConnect via the telnet interface and type
reset halt after the power was detected		Reset should return without error and the output should contain
target state: halted		 + + JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
+ nSRST pulls nTRST, falling back to "reset run_and_halt"
+ target state: halted
+ target halted in ARM state due to debug request, current mode: Supervisor
+ cpsr: 0x300000d3 pc: 0x00003a38 + + 		PASS
+ +

JTAG Speed

+ + + + + + + + + + + + + + + + + + + + + + + +
IDTargetZY1000DescriptionInitial stateInputExpected outputActual outputPass/Fail
RES001SAM7S64ZY100016MHz on normal operationReset init the target according to RES002 Exercise a memory access over the JTAG, for example
mdw 0x0 32		The command should run without any errors. If any JTAG checking errors happen, the test failed + + > jtag_khz 16000
+ > mdw 0 32
+ 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff + + 		PASS
+ +

Debugging

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputActual outputPass/Fail
DBG001SAM7S64ZY1000Load is workingReset init is working, RAM is accesible, GDB server is startedOn the console of the OS:
+ arm-elf-gdb test_ram.elf
+ (gdb) target remote ip:port
+ (gdb) load + 		Load should return without error, typical output looks like:
+ + Loading section .text, size 0x14c lma 0x0
+ Start address 0x40, load size 332
+ Transfer rate: 180 bytes/sec, 332 bytes/write.
+ + 		+ (gdb) load
+ Loading section .text, size 0x194 lma 0x200000
+ Start address 0x200040, load size 404
+ Transfer rate: 17470 bits/sec, 404 bytes/write. + 		PASS
DBG002SAM7S64ZY1000Software breakpointLoad the test_ram.elf application, use instructions from GDB001In the GDB console:
+ + (gdb) monitor arm7_9 sw_bkpts enable
+ software breakpoints enabled
+ (gdb) break main
+ Breakpoint 1 at 0xec: file src/main.c, line 71.
+ (gdb) continue
+ Continuing. + + 		The software breakpoint should be reached, a typical output looks like:
+ + target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x000000d3 pc: 0x000000ec
+
+ Breakpoint 1, main () at src/main.c:71
+ 71 DWORD a = 1; + + 		+ + (gdb) break main
+ Breakpoint 2 at 0x200134: file src/main.c, line 69.
+ (gdb) c
+ Continuing.
+ target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x00200134
+
+ Breakpoint 2, main () at src/main.c:69
+ 69 DWORD a = 1; + + 		PASS
DBG003SAM7S64ZY1000Single step in a RAM applicationLoad the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002In GDB, type
(gdb) step		The next instruction should be reached, typical output:
+ + (gdb) step
+ target state: halted
+ target halted in ARM state due to single step, current mode: Abort
+ cpsr: 0x20000097 pc: 0x000000f0
+ target state: halted
+ target halted in ARM state due to single step, current mode: Abort
+ cpsr: 0x20000097 pc: 0x000000f4
+ 72 DWORD b = 2; + + 		+ + (gdb) step
+ target state: halted
+ target halted in ARM state due to single step, current mode: Abort
+ cpsr: 0x20000097 pc: 0x000000f0
+ target state: halted
+ target halted in ARM state due to single step, current mode: Abort
+ cpsr: 0x20000097 pc: 0x000000f4
+ 72 DWORD b = 2; + + 		PASS
DBG004SAM7S64ZY1000Software break points are working after a resetLoad the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002In GDB, type
+ (gdb) monitor reset
+ (gdb) load
+ (gdb) continue
+ 		The breakpoint should be reached, typical output:
+ + target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x000000d3 pc: 0x000000ec
+
+ Breakpoint 1, main () at src/main.c:71
+ 71 DWORD a = 1; + + 		+ (gdb) moni reset
+ JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)
+ target state: halted
+ target halted in ARM state due to debug request, current mode: Supervisor
+ cpsr: 0x600000d3 pc: 0x00003e28
+ executing reset script 'event/sam7s256_reset.script'
+ (gdb) load
+ Loading section .text, size 0x194 lma 0x200000
+ Start address 0x200040, load size 404
+ Transfer rate: 20455 bits/sec, 404 bytes/write.
+ (gdb) continue
+ Continuing.
+ target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x00200134
+
+ Breakpoint 2, main () at src/main.c:69
+ 69 DWORD a = 1; + 		PASS
DBG005SAM7S64ZY1000Hardware breakpointFlash the test_rom.elf application. Make this test after FLA004 has passedBe sure that gdb_memory_map and gdb_flash_program are enabled. In GDB, type
+ + (gdb) monitor reset
+ (gdb) load
+ Loading section .text, size 0x194 lma 0x100000
+ Start address 0x100040, load size 404
+ Transfer rate: 179 bytes/sec, 404 bytes/write.
+ (gdb) monitor arm7_9 force_hw_bkpts enable
+ force hardware breakpoints enabled
+ (gdb) break main
+ Breakpoint 1 at 0x100134: file src/main.c, line 69.
+ (gdb) continue
+ + 		The breakpoint should be reached, typical output:
+ + Continuing.
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1;
+ + 		+ + (gdb) break main
+ Breakpoint 1 at 0x100134: file src/main.c, line 69.
+ (gdb) c
+ Continuing.
+ target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x00100134
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1; + + 		PASS
DBG006SAM7S64ZY1000Hardware breakpoint is set after a resetFollow the instructions to flash and insert a hardware breakpoint from DBG005In GDB, type
+ + (gdb) monitor reset
+ (gdb) monitor reg pc 0x100000
+ pc (/32): 0x00100000
+ (gdb) continue +
+ where the value inserted in PC is the start address of the application + 		The breakpoint should be reached, typical output:
+ + Continuing.
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1;
+ + 		+ + Continuing.
+ target state: halted
+ target halted in ARM state due to single step, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x00100040
+ target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x00100134
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1; +
+ Aren't there too many "halted" signs? + 		PASS
DBG007SAM7S64ZY1000Single step in ROMFlash the test_rom.elf application and set a breakpoint in main, use DBG005. Make this test after FLA004 has passedBe sure that gdb_memory_map and gdb_flash_program are enabled. In GDB, type
+ + (gdb) monitor reset
+ (gdb) load
+ Loading section .text, size 0x194 lma 0x100000
+ Start address 0x100040, load size 404
+ Transfer rate: 179 bytes/sec, 404 bytes/write.
+ (gdb) monitor arm7_9 force_hw_bkpts enable
+ force hardware breakpoints enabled
+ (gdb) break main
+ Breakpoint 1 at 0x100134: file src/main.c, line 69.
+ (gdb) continue
+ Continuing.
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1;
+ (gdb) step + + 		The breakpoint should be reached, typical output:
+ + target state: halted
+ target halted in ARM state due to single step, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x0010013c
+ 70 DWORD b = 2;
+ + 		+ (gdb) step
+ target state: halted
+ target halted in ARM state due to single step, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x00100138
+ target state: halted
+ target halted in ARM state due to single step, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x0010013c
+ 70 DWORD b = 2; + 		PASS
+ +

RAM access

+Note: these tests are not designed to test/debug the target, but to test functionalities! + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputActual outputPass/Fail
RAM001SAM7S64ZY100032 bit Write/read RAMReset init is workingOn the telnet interface
+ > mww ram_address 0xdeadbeef 16
+ > mdw ram_address 32 + + 		The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 32bit long containing 0xdeadbeef.
+ + > mww 0x0 0xdeadbeef 16
+ > mdw 0x0 32
+ 0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00000040: e1a00000 e59fa51c e59f051c e04aa000 00080017 00009388 00009388 00009388
+ 0x00000060: 00009388 0002c2c0 0002c2c0 000094f8 000094f4 00009388 00009388 00009388
+ + 		+ + > mww 0x00200000 0xdeadbeef 16
+ > mdw 0x00200000 32
+ 0x00200000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00200020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00200040: e59f10b4 e3a00902 e5810004 e59f00ac e59f10ac e5810000 e3e010ff e59f00a4
+ 0x00200060: e5810060 e59f10a0 e3e00000 e5810130 e5810124 e321f0db e59fd090 e321f0d7 + + 		PASS
RAM002SAM7S64ZY100016 bit Write/read RAMReset init is workingOn the telnet interface
+ > mwh ram_address 0xbeef 16
+ > mdh ram_address 32 + + 		The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 16bit long containing 0xbeef.
+ + > mwh 0x0 0xbeef 16
+ > mdh 0x0 32
+ 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef
+ 0x00000020: 00e0 0000 021c 0000 0240 0000 026c 0000 0288 0000 0000 0000 0388 0000 0350 0000
+ > + + 		+ > mwh 0x00200000 0xbeef 16
+ > mdh 0x00200000 32
+ 0x00200000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef
+ 0x00200020: 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 + 		PASS
RAM003SAM7S64ZY10008 bit Write/read RAMReset init is workingOn the telnet interface
+ > mwb ram_address 0xab 16
+ > mdb ram_address 32 + + 		The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 8bit long containing 0xab.
+ + > mwb ram_address 0xab 16
+ > mdb ram_address 32
+ 0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ > + + 		+ > mwb 0x00200000 0xab 16
+ > mdb 0x00200000 32
+ 0x00200000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 		PASS
+ + + +

Flash access

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputActual outputPass/Fail
FLA001SAM7S64ZY1000Flash probeReset init is workingOn the telnet interface:
+ > flash probe 0 + 		The command should execute without error. The output should state the name of the flash and the starting address. An example of output:
+ flash 'ecosflash' found at 0x01000000 + 		+ + > flash probe 0
+ flash 'at91sam7' found at 0x00100000 + + 		PASS
FLA002SAM7S64ZY1000flash fillwReset init is working, flash is probedOn the telnet interface
+ > flash fillw 0x1000000 0xdeadbeef 16 + + 		The commands should execute without error. The output looks like:
+ + wrote 64 bytes to 0x01000000 in 11.610000s (0.091516 kb/s) +
+ To verify the contents of the flash:
+ + > mdw 0x1000000 32
+ 0x01000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x01000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff + + 		+ > flash fillw 0x100000 0xdeadbeef 16
+ wrote 64 bytes to 0x00100000 in 1.110000s (0.957207 kb/s)
+ > mdw 0x100000 32
+ 0x00100000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00100020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x00100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff + 		PASS
FLA003SAM7S64ZY1000Flash eraseReset init is working, flash is probedOn the telnet interface
+ > flash erase_address 0x1000000 0x2000 + + 		The commands should execute without error.
+ + erased address 0x01000000 length 8192 in 4.970000s + + To check that the flash has been erased, read at different addresses. The result should always be 0xff. + + > mdw 0x1000000 32
+ 0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff + + 		+ > flash erase_address 0x100000 0x2000
+ erased address 0x00100000 length 8192 in 0.510000s
+ > mdw 0x100000 32
+ 0x00100000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x00100020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x00100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x00100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ > + 		PASS
FLA004SAM7S64ZY1000Loading to flash from GDBReset init is working, flash is probed, connectivity to GDB server is workingStart GDB using a ROM elf image, eg: arm-elf-gdb test_rom.elf.
+ + (gdb) target remote ip:port
+ (gdb) monitor reset
+ (gdb) load
+ Loading section .text, size 0x194 lma 0x100000
+ Start address 0x100040, load size 404
+ Transfer rate: 179 bytes/sec, 404 bytes/write. + (gdb) monitor verify_image path_to_elf_file + + 		The output should look like:
+ + verified 404 bytes in 5.060000s +
+ The failure message is something like:
+ Verify operation failed address 0x00200000. Was 0x00 instead of 0x18 + 		+ + (gdb) load
+ Loading section .text, size 0x194 lma 0x100000
+ Start address 0x100040, load size 404
+ Transfer rate: 1540 bits/sec, 404 bytes/write.
+ (gdb) monitor verify_image /tftp/10.0.0.9/c:\workspace/ecosboard/ecosboard/phi/openocd/rep/testing/examples/SAM7S256Test/test_rom.elf
+ verified 404 bytes in 4.860000s + + 		PASS
+ + + \ No newline at end of file diff --git a/testing/testcases.html b/testing/testcases.html new file mode 100644 index 000000000..df8bfe710 --- /dev/null +++ b/testing/testcases.html @@ -0,0 +1,578 @@ + + +Test cases + + + +

Test cases

+

Test case results

+The test results are stored in seperate documents. One document for +each subversion number. + + + + +
Test resultscomment
607
templateTest results template
+ +

Vocabulary

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Passed versionThe latest branch and version on which the test is known to pass
Broken versionThe latest branch and version on which the test is known to fail. n/a when older than passed version.
IDA unqiue ID to refer to a test. The unique numbers are maintained in this file. Note that the same test can be run on different hardware/interface. Each combination yields a unique id.
Test caseAn atomic entity that describes the operations needed to test a feature or only a part of it. The test case should: +
    +
  • be uniquely identifiable
    • +
  • define the complete prerequisites of the test (eg: the target, the interface, the initial state of the system)
    • +
  • define the input to be applied to the system in order to execute the test
    • +
  • define the expected output
    • +
  • contain the output resulted by running the test case
    • +
  • contain the result of the test (pass/fail)
    • +
+
Test suiteA (completable) collection of test cases
TestingTesting refers to running the test suite for a specific revision of the software, + for one or many targets, using one or many JTAG interfaces. Testing should be be stored + along with all the other records for that specific revision. For releases, the results + can be stored along with the binaries
Target = ANYAny target can be used for this test
Interface = ANYAny interface can be used for this test
Target = "reset_config srst_and_trst"Any target which supports the reset_config above
+ +

Test cases

+ +

Connectivity

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputPass/Fail
CON001ALLALLTelnet connectionPower on, jtag target attachedOn console, type
telnet ip port		Open On-Chip Debugger
>		PASS/FAIL
CON002ALLALLGDB server connectionPower on, jtag target attachedOn GDB console, type
target remote ip:port		Remote debugging using 10.0.0.73:3333PASS/FAIL
+ +

Reset

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputPass/Fail
RES001Fill in!Fill in!Reset halt on a blank targetErase all the content of the flashConnect via the telnet interface and type
reset halt		Reset should return without error and the output should contain
target state: halted
pc = 0		PASS/FAIL
RES002Fill in!Fill in!Reset init on a blank targetErase all the content of the flashConnect via the telnet interface and type
reset init		Reset should return without error and the output should contain
executing reset script 'name_of_the_script'		PASS/FAIL
RES003Fill in!Fill in!Reset after a power cycle of the targetReset the target then power cycle the targetConnect via the telnet interface and type
reset halt after the power was detected		Reset should return without error and the output should contain
target state: halted		PASS/FAIL
RES004ARM7/9,reset_config srst_and_trstANYReset halt on a blank target where reset halt is supportedErase all the content of the flashConnect via the telnet interface and type
reset halt		Reset should return without error and the output should contain
target state: halted
pc = 0		PASS/FAIL
RES005arm926ejs,reset_config srst_and_trstANYReset halt on a blank target where reset halt is supported. This target has problems with the reset vector catch being disabled by TRSTErase all the content of the flashConnect via the telnet interface and type
reset halt		Reset should return without error and the output should contain
target state: halted
pc = 0		PASS/FAIL
+ +

JTAG Speed

+ + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputPass/Fail
RES001Fill in!Fill in!16MHz on normal operationReset init the target according to RES002 Exercise a memory access over the JTAG, for example
mdw 0x0 32		The command should run without any errors. If any JTAG checking errors happen, the test failedPASS/FAIL
+ +

Debugging

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputPass/Fail
DBG001Fill in!Fill in!Load is workingReset init is working, RAM is accesible, GDB server is startedOn the console of the OS:
+ arm-elf-gdb test_ram.elf
+ (gdb) target remote ip:port
+ (gdb) load + 		Load should return without error, typical output looks like:
+ + Loading section .text, size 0x14c lma 0x0
+ Start address 0x40, load size 332
+ Transfer rate: 180 bytes/sec, 332 bytes/write.
+ + 		PASS/FAIL
DBG002Fill in!Fill in!Software breakpointLoad the test_ram.elf application, use instructions from GDB001In the GDB console:
+ + (gdb) monitor arm7_9 sw_bkpts enable
+ software breakpoints enabled
+ (gdb) break main
+ Breakpoint 1 at 0xec: file src/main.c, line 71.
+ (gdb) continue
+ Continuing. + + 		The software breakpoint should be reached, a typical output looks like:
+ + target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x000000d3 pc: 0x000000ec
+
+ Breakpoint 1, main () at src/main.c:71
+ 71 DWORD a = 1; + + 		PASS/FAIL
DBG003Fill in!Fill in!Single step in a RAM applicationLoad the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002In GDB, type
(gdb) step		The next instruction should be reached, typical output:
+ + (gdb) step
+ target state: halted
+ target halted in ARM state due to single step, current mode: Abort
+ cpsr: 0x20000097 pc: 0x000000f0
+ target state: halted
+ target halted in ARM state due to single step, current mode: Abort
+ cpsr: 0x20000097 pc: 0x000000f4
+ 72 DWORD b = 2; + + 		PASS/FAIL
DBG004Fill in!Fill in!Software break points are working after a resetLoad the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002In GDB, type
+ (gdb) monitor reset
+ (gdb) load
+ (gdb) continue
+ 		The breakpoint should be reached, typical output:
+ + target state: halted
+ target halted in ARM state due to breakpoint, current mode: Supervisor
+ cpsr: 0x000000d3 pc: 0x000000ec
+
+ Breakpoint 1, main () at src/main.c:71
+ 71 DWORD a = 1; + + 		PASS/FAIL
DBG005Fill in!Fill in!Hardware breakpointFlash the test_rom.elf application. Make this test after FLA004 has passedBe sure that gdb_memory_map and gdb_flash_program are enabled. In GDB, type
+ + (gdb) monitor reset
+ (gdb) load
+ Loading section .text, size 0x194 lma 0x100000
+ Start address 0x100040, load size 404
+ Transfer rate: 179 bytes/sec, 404 bytes/write.
+ (gdb) monitor arm7_9 force_hw_bkpts enable
+ force hardware breakpoints enabled
+ (gdb) break main
+ Breakpoint 1 at 0x100134: file src/main.c, line 69.
+ (gdb) continue
+ + 		The breakpoint should be reached, typical output:
+ + Continuing.
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1;
+ + 		PASS/FAIL
DBG006Fill in!Fill in!Hardware breakpoint is set after a resetFollow the instructions to flash and insert a hardware breakpoint from DBG005In GDB, type
+ + (gdb) monitor reset
+ (gdb) monitor reg pc 0x100000
+ pc (/32): 0x00100000
+ (gdb) continue + + 		The breakpoint should be reached, typical output:
+ + Continuing.
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1;
+ + 		PASS/FAIL
DBG007Fill in!Fill in!Single step in ROMFlash the test_rom.elf application and set a breakpoint in main, use DBG005. Make this test after FLA004 has passedBe sure that gdb_memory_map and gdb_flash_program are enabled. In GDB, type
+ + (gdb) monitor reset
+ (gdb) load
+ Loading section .text, size 0x194 lma 0x100000
+ Start address 0x100040, load size 404
+ Transfer rate: 179 bytes/sec, 404 bytes/write.
+ (gdb) monitor arm7_9 force_hw_bkpts enable
+ force hardware breakpoints enabled
+ (gdb) break main
+ Breakpoint 1 at 0x100134: file src/main.c, line 69.
+ (gdb) continue
+ Continuing.
+
+ Breakpoint 1, main () at src/main.c:69
+ 69 DWORD a = 1;
+ (gdb) step + + 		The breakpoint should be reached, typical output:
+ + target state: halted
+ target halted in ARM state due to single step, current mode: Supervisor
+ cpsr: 0x60000013 pc: 0x0010013c
+ 70 DWORD b = 2;
+ + 		PASS/FAIL
+ +

RAM access

+Note: these tests are not designed to test/debug the target, but to test functionalities! + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputPass/Fail
RAM001Fill in!Fill in!32 bit Write/read RAMReset init is workingOn the telnet interface
+ > mww ram_address 0xdeadbeef 16
+ > mdw ram_address 32 + + 		The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 32bit long containing 0xdeadbeef.
+ + > mww 0x0 0xdeadbeef 16
+ > mdw 0x0 32
+ 0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x00000040: e1a00000 e59fa51c e59f051c e04aa000 00080017 00009388 00009388 00009388
+ 0x00000060: 00009388 0002c2c0 0002c2c0 000094f8 000094f4 00009388 00009388 00009388
+ + 		PASS/FAIL
RAM001Fill in!Fill in!16 bit Write/read RAMReset init is workingOn the telnet interface
+ > mwh ram_address 0xbeef 16
+ > mdh ram_address 32 + + 		The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 16bit long containing 0xbeef.
+ + > mwh 0x0 0xbeef 16
+ > mdh 0x0 32
+ 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef
+ 0x00000020: 00e0 0000 021c 0000 0240 0000 026c 0000 0288 0000 0000 0000 0388 0000 0350 0000
+ > + + 		PASS/FAIL
RAM003Fill in!Fill in!8 bit Write/read RAMReset init is workingOn the telnet interface
+ > mwb ram_address 0xab 16
+ > mdb ram_address 32 + + 		The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 8bit long containing 0xab.
+ + > mwh 0x0 0x0 16
+ > mwb ram_address 0xab 16
+ > mdb ram_address 32
+ 0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
+ > + + 		PASS/FAIL
+ + + +

Flash access

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
IDTargetInterfaceDescriptionInitial stateInputExpected outputPass/Fail
FLA001Fill in!Fill in!Flash probeReset init is workingOn the telnet interface:
+ > flash probe 0 + 		The command should execute without error. The output should state the name of the flash and the starting address. An example of output:
+ flash 'ecosflash' found at 0x01000000 + 		PASS/FAIL
FLA002Fill in!Fill in!flash fillwReset init is working, flash is probedOn the telnet interface
+ > flash fillw 0x1000000 0xdeadbeef 16 + + 		The commands should execute without error. The output looks like:
+ + wrote 64 bytes to 0x01000000 in 11.610000s (0.091516 kb/s) +
+ To verify the contents of the flash:
+ + > mdw 0x1000000 32
+ 0x01000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x01000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef
+ 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff + + 		PASS/FAIL
FLA003Fill in!Fill in!Flash eraseReset init is working, flash is probedOn the telnet interface
+ > flash erase_address 0x1000000 0x2000 + + 		The commands should execute without error.
+ + erased address 0x01000000 length 8192 in 4.970000s + + To check that the flash has been erased, read at different addresses. The result should always be 0xff. + + > mdw 0x1000000 32
+ 0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
+ 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff + + 		PASS/FAIL
FLA004Fill in!Fill in!Loading to flash from GDBReset init is working, flash is probed, connectivity to GDB server is workingStart GDB using a ROM elf image, eg: arm-elf-gdb test_rom.elf.
+ + (gdb) target remote ip:port
+ (gdb) monitor reset
+ (gdb) load
+ Loading section .text, size 0x194 lma 0x100000
+ Start address 0x100040, load size 404
+ Transfer rate: 179 bytes/sec, 404 bytes/write. + (gdb) monitor verify_image path_to_elf_file + + 		The output should look like:
+ + verified 404 bytes in 5.060000s +
+ The failure message is something like:
+ Verify operation failed address 0x00200000. Was 0x00 instead of 0x18 + 		PASS/FAIL
+ + + \ No newline at end of file