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[DYNAREC] Added a new missing mode for fallback opcodes (#1896)

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This commit is contained in:
Yang Liu 2024-10-03 02:44:04 +08:00 committed by GitHub
parent 564d06e84c
commit 6cbcfc7ab8
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GPG Key ID: B5690EEEBB952194
10 changed files with 21 additions and 18 deletions
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1
docs/USAGE.md
View File

@ -223,6 +223,7 @@ Behavior with FillBlock is not available (FillBlock build Dynarec blocks and is
Dynarec print the missing opcodes
* 0 : not print the missing opcode (Default, unless DYNAREC_LOG>=1 or DYNAREC_DUMP>=1 is used)
* 1 : Will print the missing opcodes
* 2 : Will print the fallback to scalar opcodes (only valid on RISC-V)
#### BOX64_SSE_FLUSHTO0 *
Handling of SSE Flush to 0 flags

6
src/core.c
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@ -842,11 +842,13 @@ void LoadLogEnv()
p = getenv("BOX64_DYNAREC_MISSING");
if(p) {
if(strlen(p)==1) {
if(p[0]>='0' && p[0]<='1')
if(p[0]>='0' && p[0]<='2')
box64_dynarec_missing = p[0]-'0';
}
if(box64_dynarec_missing)
if(box64_dynarec_missing==1)
printf_log(LOG_INFO, "Dynarec will print missing opcodes\n");
else if (box64_dynarec_missing==2)
printf_log(LOG_INFO, "Dynarec will print fallback to scalar opcodes\n");
}
p = getenv("BOX64_NODYNAREC");
if(p) {

2
src/dynarec/arm64/dynarec_arm64_67_avx.c
View File

@ -126,7 +126,7 @@ uintptr_t dynarec64_67_AVX(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int
}
else {DEFAULT;}
if((*ok==-1) && (box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing)) {
if((*ok==-1) && (box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==1)) {
dynarec_log(LOG_NONE, "Dynarec unimplemented AVX opcode size %d prefix %s map %s opcode %02X ", 128<<vex.l, avx_prefix_string(vex.p), avx_map_string(vex.m), opcode);
}
return addr;

2
src/dynarec/arm64/dynarec_arm64_avx.c
View File

@ -71,7 +71,7 @@ uintptr_t dynarec64_AVX(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ni
addr = dynarec64_AVX_F3_0F38(dyn, addr, ip, ninst, vex, ok, need_epilog);
else {DEFAULT;}
if((*ok==-1) && (box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing)) {
if((*ok==-1) && (box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==1)) {
dynarec_log(LOG_NONE, "Dynarec unimplemented AVX opcode size %d prefix %s map %s opcode %02X ", 128<<vex.l, avx_prefix_string(vex.p), avx_map_string(vex.m), opcode);
}
return addr;

2
src/dynarec/arm64/dynarec_arm64_pass0.h
View File

@ -35,7 +35,7 @@
#define DEFAULT \
--dyn->size; \
*ok = -1; \
if(box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing) {\
if(box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==1) {\
dynarec_log(LOG_NONE, "%p: Dynarec stopped because of %sOpcode %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \
(void*)ip, rex.is32bits?"x86 ":"x64 ",\
PKip(0), \

2
src/dynarec/la64/dynarec_la64_pass0.h
View File

@ -40,7 +40,7 @@
#define DEFAULT \
--dyn->size; \
*ok = -1; \
if (box64_dynarec_log >= LOG_INFO || box64_dynarec_dump || box64_dynarec_missing) { \
if (box64_dynarec_log >= LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==1) { \
dynarec_log(LOG_NONE, "%p: Dynarec stopped because of %sOpcode %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \
(void*)ip, rex.is32bits ? "32bits " : "", \
PKip(0), \

2
src/dynarec/rv64/dynarec_rv64_0f_vector.c
View File

@ -237,7 +237,7 @@ uintptr_t dynarec64_0F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip,
}
break;
case 0xC6:
if (rv64_xtheadvector) return 0; // lack of vrgatherei16.vv
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // lack of vrgatherei16.vv
INST_NAME("SHUFPS Gx, Ex, Ib");
nextop = F8;

18
src/dynarec/rv64/dynarec_rv64_660f_vector.c
View File

@ -309,7 +309,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
VADD_VX(q0, q1, xZR, VECTOR_MASKED);
break;
case 0x17:
if (rv64_xtheadvector) return 0; // TODO: VMASK convertion
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // TODO: VMASK convertion
INST_NAME("PTEST Gx, Ex");
nextop = F8;
@ -617,7 +617,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
opcode = F8;
switch (opcode) {
case 0x0E:
if (rv64_xtheadvector) return 0; // TODO: VMASK convertion
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // TODO: VMASK convertion
INST_NAME("PBLENDW Gx, Ex, Ib");
nextop = F8;
@ -674,7 +674,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
}
break;
case 0x50:
if (rv64_xtheadvector) return 0; // TODO: VMASK convertion
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // TODO: VMASK convertion
INST_NAME("PMOVMSKD Gd, Ex");
nextop = F8;
@ -1096,7 +1096,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
}
break;
case 0x70:
if (rv64_xtheadvector) return 0; // lack of vrgatherei16.vv
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // lack of vrgatherei16.vv
INST_NAME("PSHUFD Gx, Ex, Ib");
nextop = F8;
@ -1326,7 +1326,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
break;
case 0xA3 ... 0xC1: return 0;
case 0xC4:
if (rv64_xtheadvector) return 0; // TODO: VMASK convertion
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // TODO: VMASK convertion
INST_NAME("PINSRW Gx, Ed, Ib");
nextop = F8;
@ -1441,7 +1441,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
}
break;
case 0xD7:
if (rv64_xtheadvector) return 0; // TODO: VMASK convertion
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // TODO: VMASK convertion
INST_NAME("PMOVMSKB Gd, Ex");
nextop = F8;
@ -1519,7 +1519,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
VAND_VV(q0, q1, q0, VECTOR_UNMASKED);
break;
case 0xE0:
if (rv64_xtheadvector) return 0; // lack of vaddu.vv
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // lack of vaddu.vv
INST_NAME("PAVGB Gx, Ex");
nextop = F8;
@ -1572,7 +1572,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
VSRA_VX(q0, q0, x4, VECTOR_UNMASKED);
break;
case 0xE3:
if (rv64_xtheadvector) return 0; // lack of vaddu.vv
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // lack of vaddu.vv
INST_NAME("PAVGW Gx, Ex");
nextop = F8;
@ -1708,7 +1708,7 @@ uintptr_t dynarec64_660F_vector(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t i
VSLL_VX(q0, q0, x4, VECTOR_UNMASKED);
break;
case 0xF5:
if (rv64_xtheadvector) return 0; // lack of vrgatherei16.vv
if (rv64_xtheadvector) { DEFAULT_VECTOR; } // lack of vrgatherei16.vv
INST_NAME("PMADDWD Gx, Ex");
nextop = F8;

2
src/dynarec/rv64/dynarec_rv64_pass0.h
View File

@ -45,7 +45,7 @@
#define DEFAULT \
--dyn->size; \
*ok = -1; \
if(box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing) {\
if(box64_dynarec_log>=LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==1) {\
dynarec_log(LOG_NONE, "%p: Dynarec stopped because of %sOpcode %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \
(void*)ip, rex.is32bits?"32bits ":"",\
PKip(0), \

2
src/dynarec/rv64/dynarec_rv64_pass3.h
View File

@ -29,7 +29,7 @@
#define FTABLE64(A, V) {mmx87_regs_t v = {.d = V}; int val64offset = Table64(dyn, v.q, 3); MESSAGE(LOG_DUMP, " FTable64: %g\n", v.d); AUIPC(x1, SPLIT20(val64offset)); FLD(A, x1, SPLIT12(val64offset));}
#define DEFAULT_VECTOR \
if (box64_dynarec_log >= LOG_INFO || box64_dynarec_dump || box64_dynarec_missing) { \
if (box64_dynarec_log >= LOG_INFO || box64_dynarec_dump || box64_dynarec_missing==2) { \
dynarec_log(LOG_NONE, "%p: Dynarec fallback to scalar version because of %sOpcode" \
" %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X", \
(void*)ip, rex.is32bits ? "x86 " : "x64 ", \