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[ARM64_DYNAREC] More handling of low precision x87 flag change

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This commit is contained in:
ptitSeb 2025-04-16 15:08:56 +02:00
parent d7eb87129e
commit b26a20e709
3 changed files with 4 additions and 0 deletions
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2
src/dynarec/arm64/dynarec_arm64_d9.c
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@ -562,6 +562,8 @@ uintptr_t dynarec64_D9(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
INST_NAME("FLDCW Ew");
GETEW(x1, 0);
STRH_U12(x1, xEmu, offsetof(x64emu_t, cw)); // hopefully cw is not too far for an imm8
if(dyn->need_x87check)
UBFXw(x87pc, x1, 8, 2);
break;
case 6:
INST_NAME("FNSTENV Ed");

1
src/dynarec/arm64/dynarec_arm64_db.c
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@ -134,6 +134,7 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
MESSAGE(LOG_DUMP, "Need Optimization (FNINIT)\n");
x87_purgecache(dyn, ninst, 0, x1, x2, x3);
CALL(reset_fpu, -1);
ARM64_CHECK_PRECISION();
break;
case 0xE8:
case 0xE9:

1
src/dynarec/arm64/dynarec_arm64_dd.c
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@ -206,6 +206,7 @@ uintptr_t dynarec64_DD(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
if(ed!=x1) {MOVx_REG(x1, ed);}
CALL(native_fsave, -1);
CALL(reset_fpu, -1);
ARM64_CHECK_PRECISION();
break;
case 7:
INST_NAME("FNSTSW m2byte");