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[DYNAREC] Improved strong memory model emulation (backported from box64)

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This commit is contained in:
ptitSeb 2023-12-09 10:21:34 +01:00
parent ac8ae8f0ec
commit 18e8b06dfb
4 changed files with 17 additions and 6 deletions
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12
src/dynarec/dynarec_arm_00.c
View File

@ -1270,6 +1270,8 @@ uintptr_t dynarec00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
INST_NAME("MOV AL, Ob");
u32 = F32;
MOV32(x2, u32);
if(isLockAddress(u32)) lock=1; else lock = 0;
SMREADLOCK(lock);
LDRB_IMM9(x2, x2, 0);
BFI(xEAX, x2, 0, 8);
break;
@ -1277,21 +1279,25 @@ uintptr_t dynarec00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
INST_NAME("MOV EAX, Od");
u32 = F32;
MOV32(x2, u32);
if(isLockAddress(u32)) lock=1; else lock = 0;
SMREADLOCK(lock);
LDR_IMM9(xEAX, x2, 0);
break;
case 0xA2:
INST_NAME("MOV Ob, AL");
u32 = F32;
MOV32(x2, u32);
if(isLockAddress(u32)) lock=1; else lock = 0;
STRB_IMM9(xEAX, x2, 0);
SMWRITE();
SMWRITELOCK(lock);
break;
case 0xA3:
INST_NAME("MOV Od, EAX");
u32 = F32;
MOV32(x2, u32);
if(isLockAddress(u32)) lock=1; else lock = 0;
STR_IMM9(xEAX, x2, 0);
SMWRITE();
SMWRITELOCK(lock);
break;
case 0xA4:
INST_NAME("MOVSB");
@ -1671,6 +1677,7 @@ uintptr_t dynarec00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
SKIPTEST(x14);
MESSAGE(LOG_DEBUG, "Exit x86 Emu\n");
MOV32(x14, ip+1+2);
SMEND();
STM(xEmu, (1<<xEAX)|(1<<xEBX)|(1<<xECX)|(1<<xEDX)|(1<<xESI)|(1<<xEDI)|(1<<xESP)|(1<<xEBP)|(1<<xEIP)|(1<<xFlags));
MOVW(x1, 1);
STR_IMM9(x1, xEmu, offsetof(x86emu_t, quit));
@ -1679,6 +1686,7 @@ uintptr_t dynarec00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
} else {
MESSAGE(LOG_DUMP, "Native Call to %s\n", GetNativeName(GetNativeFnc(ip)));
SKIPTEST(x14);
SMEND();
x87_forget(dyn, ninst, x3, x14, 0);
if((box86_log<2) && !cycle_log) { // call the wrapper directly
uintptr_t ncall[2]; // to avoid BUSERROR!!!

7
src/dynarec/dynarec_arm_66.c
View File

@ -18,6 +18,7 @@
#include "dynarec_arm.h"
#include "dynarec_arm_private.h"
#include "arm_printer.h"
#include "custommem.h"
#include "dynarec_arm_helper.h"
#include "dynarec_arm_functions.h"
@ -649,7 +650,8 @@ uintptr_t dynarec66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
INST_NAME("MOV, AX, Od");
u32 = F32;
MOV32(x2, u32);
SMREAD();
if(isLockAddress(u32)) lock=1; else lock = 0;
SMREADLOCK(lock);
LDRH_IMM8(x2, x2, 0);
BFI(xEAX, x2, 0, 16);
break;
@ -657,8 +659,9 @@ uintptr_t dynarec66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst,
INST_NAME("MOV Od, AX");
u32 = F32;
MOV32(x2, u32);
if(isLockAddress(u32)) lock=1; else lock = 0;
STRH_IMM8(xEAX, x2, 0);
SMWRITE();
SMWRITELOCK(lock);
break;
case 0xA5:
INST_NAME("MOVSW");

2
src/dynarec/dynarec_arm_helper.h
View File

@ -394,7 +394,7 @@
} else dyn->f.pending = SF_SET
#endif
#ifndef JUMP
#define JUMP(A, C)
#define JUMP(A, C) SMEND()
#endif
#ifndef BARRIER
#define BARRIER(A)

2
src/dynarec/dynarec_arm_pass0.h
View File

@ -16,7 +16,7 @@
dyn->f.pending=(B)&SF_SET_PENDING; \
dyn->f.dfnone=((B)&SF_SET)?1:0;
#define EMIT(A)
#define JUMP(A, C) add_next(dyn, (uintptr_t)A); dyn->insts[ninst].x86.jmp = A; dyn->insts[ninst].x86.jmp_cond = C
#define JUMP(A, C) add_next(dyn, (uintptr_t)A); SMEND(); dyn->insts[ninst].x86.jmp = A; dyn->insts[ninst].x86.jmp_cond = C
#define BARRIER(A) if(A!=BARRIER_MAYBE) {fpu_purgecache(dyn, ninst, 0, x1, x2, x3); dyn->insts[ninst].x86.barrier = A;} else dyn->insts[ninst].barrier_maybe = 1
#define BARRIER_NEXT(A) dyn->insts[ninst+1].x86.barrier = A
#define NEW_INST \