riscv-software-src/riscv-isa-sim
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Move commit logging check off the critical path

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Suppress TLB refill when commit logging is enabled to facilitate this
strategy.
This commit is contained in:
Andrew Waterman
2025-04-16 20:40:37 -07:00
parent 52517f7719
commit 92e4f02112
3 changed files with 10 additions and 7 deletions
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10
riscv/mmu.cc
View File

@@ -256,6 +256,9 @@ void mmu_t::load_slow_path(reg_t original_addr, reg_t len, uint8_t* bytes, xlate
bytes += sizeof(reg_t);
}
check_triggers(triggers::OPERATION_LOAD, transformed_addr, access_info.effective_virt, reg_from_bytes(len, bytes));
if (proc && unlikely(proc->get_log_commits_enabled()))
proc->state.log_mem_read.push_back(std::make_tuple(original_addr, 0, len));
}
void mmu_t::store_slow_path_intrapage(reg_t len, const uint8_t* bytes, mem_access_info_t access_info, bool actually_store)
@@ -318,6 +321,9 @@ void mmu_t::store_slow_path(reg_t original_addr, reg_t len, const uint8_t* bytes
} else {
store_slow_path_intrapage(len, bytes, access_info, actually_store);
}
if (proc && unlikely(proc->get_log_commits_enabled()))
proc->state.log_mem_write.push_back(std::make_tuple(original_addr, reg_from_bytes(len, bytes), len));
}
tlb_entry_t mmu_t::refill_tlb(reg_t vaddr, reg_t paddr, char* host_addr, access_type type)
@@ -327,7 +333,9 @@ tlb_entry_t mmu_t::refill_tlb(reg_t vaddr, reg_t paddr, char* host_addr, access_
tlb_entry_t entry = {uintptr_t(host_addr) - (vaddr % PGSIZE), paddr - (vaddr % PGSIZE)};
if (in_mprv() || !pmp_homogeneous(paddr & ~reg_t(PGSIZE - 1), PGSIZE))
if (in_mprv()
|| !pmp_homogeneous(paddr & ~reg_t(PGSIZE - 1), PGSIZE)
|| (proc && proc->get_log_commits_enabled()))
return entry;
switch (type) {

6
riscv/mmu.h
View File

@@ -90,9 +90,6 @@ public:
load_slow_path(addr, sizeof(T), (uint8_t*)&res, xlate_flags);
}
if (unlikely(proc && proc->get_log_commits_enabled()))
proc->state.log_mem_read.push_back(std::make_tuple(addr, 0, sizeof(T)));
return from_target(res);
}
@@ -131,9 +128,6 @@ public:
target_endian<T> target_val = to_target(val);
store_slow_path(addr, sizeof(T), (const uint8_t*)&target_val, xlate_flags, true, false);
}
if (unlikely(proc && proc->get_log_commits_enabled()))
proc->state.log_mem_write.push_back(std::make_tuple(addr, val, sizeof(T)));
}
template<typename T>

1
riscv/processor.cc
View File

@@ -144,6 +144,7 @@ void processor_t::set_histogram(bool value)
void processor_t::enable_log_commits()
{
log_commits_enabled = true;
mmu->flush_tlb(); // the TLB caches this setting
}
void processor_t::reset()