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riscv-isa-sim/riscv/riscv.ac
2025-02-12 00:27:35 +00:00

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AC_LANG([C++])
AX_BOOST_BASE([1.53])
AX_BOOST_ASIO
AX_BOOST_REGEX
AC_CHECK_LIB([boost_system], [main], [], [])
AC_CHECK_LIB([boost_regex], [main], [], [])
AC_ARG_WITH(target,
[AS_HELP_STRING([--with-target=riscv64-unknown-elf],
[Sets the default target config])],
AC_DEFINE_UNQUOTED([TARGET_ARCH], "$withval", [Default value for --target switch]),
AC_DEFINE_UNQUOTED([TARGET_ARCH], ["riscv64-unknown-elf"], [Default value for --target switch]))
AC_SEARCH_LIBS([dlopen], [dl dld], [
AC_DEFINE([HAVE_DLOPEN], [], [Dynamic library loading is supported])
AC_SUBST([HAVE_DLOPEN], [yes])
])
AC_CHECK_LIB(pthread, pthread_create, [], [AC_MSG_ERROR([libpthread is required])])
AC_ARG_ENABLE([dual-endian], AS_HELP_STRING([--enable-dual-endian], [Enable support for running target in either endianness]))
AS_IF([test "x$enable_dual_endian" = "xyes"], [
AC_DEFINE([RISCV_ENABLE_DUAL_ENDIAN],,[Enable support for running target in either endianness])
])