From ddc8b3813f865bba0a805ddc5889e82d04b467ec Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Thu, 17 Jul 2025 13:37:36 -0700 Subject: [PATCH] Fix lint errors --- arg_lut.csv | 2 +- constants.py | 12 ++++++------ unratified/rv32_zclsd | 1 - unratified/rv32_zilsd | 2 +- 4 files changed, 8 insertions(+), 9 deletions(-) diff --git a/arg_lut.csv b/arg_lut.csv index de195d6..820f639 100644 --- a/arg_lut.csv +++ b/arg_lut.csv @@ -102,4 +102,4 @@ "rd_n0_e", 11, 8 "c_rs2_e", 6, 3 "rd_e", 11, 8 -"rs2_e", 24, 21 \ No newline at end of file +"rs2_e", 24, 21 diff --git a/constants.py b/constants.py index b7b09fd..7959a4b 100644 --- a/constants.py +++ b/constants.py @@ -144,14 +144,14 @@ latex_mapping = { "c_uimm9sphi": "uimm[5]", "c_uimm10sp_s": "uimm[5:4$\\vert$9:6]", "c_uimm9sp_s": "uimm[5:3$\\vert$8:6]", + "rd_p_e": "rd\\,$'$, even values only", + "rs2_p_e": "rs2\\,$'$, even values only", + "rd_n0_e": "rd$\\neq$0, even values only", + "c_rs2_e": "rs2, even values only", + "rd_e": "rd, even values only", + "rs2_e": "rs2, even values only", } -latex_mapping['rd_p_e'] = "rd\\,$'$, even values only" -latex_mapping['rs2_p_e'] = "rs2\\,$'$, even values only" -latex_mapping['rd_n0_e'] = 'rd$\\neq$0, even values only' -latex_mapping['c_rs2_e'] = 'rs2, even values only' -latex_mapping['rd_e'] = 'rd, even values only' -latex_mapping['rs2_e'] = 'rs2, even values only' # created a dummy instruction-dictionary like dictionary for all the instruction # types so that the same logic can be used to create their tables diff --git a/unratified/rv32_zclsd b/unratified/rv32_zclsd index b4046eb..f8d7e82 100644 --- a/unratified/rv32_zclsd +++ b/unratified/rv32_zclsd @@ -7,4 +7,3 @@ $pseudo_op rv32_c_f::c.fsw c.sd rs1_p rs2_p_e c_uimm8hi c_uimm8lo 2..0=0 15.. #quadrant 2 $pseudo_op rv32_c_f::c.flwsp c.ldsp rd_n0_e c_uimm9sphi c_uimm9splo 1..0=2 15..13=3 7=0 $pseudo_op rv32_c_f::c.fswsp c.sdsp c_rs2_e c_uimm9sp_s 2..0=2 15..13=7 - diff --git a/unratified/rv32_zilsd b/unratified/rv32_zilsd index be4f591..ebf4281 100644 --- a/unratified/rv32_zilsd +++ b/unratified/rv32_zilsd @@ -1,4 +1,4 @@ # Load/store pair for RV32 ld rd_e rs1 imm12 14..12=3 7..2=0x00 1..0=3 -sd imm12hi rs1 rs2_e imm12lo 20=0 14..12=3 6..2=0x08 1..0=3 \ No newline at end of file +sd imm12hi rs1 rs2_e imm12lo 20=0 14..12=3 6..2=0x08 1..0=3