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@ -7,9 +7,10 @@ imx (NXP i.MX)
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==============
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This BSP offers only one variant, the `imx7`. This variant supports the i.MX
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7Dual processor. The basic hardware initialization is not performed by the
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BSP. A boot loader with device tree support must be used to start the BSP,
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e.g. U-Boot.
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7Dual processor and the i.MX 6UL/ULL processor family (with slightly different
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clock settings). The basic hardware initialization is not performed by the BSP.
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A boot loader with device tree support must be used to start the BSP, e.g.
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U-Boot or barebox.
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Build Configuration Options
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---------------------------
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@ -40,9 +41,30 @@ The following options are available at the configure command line.
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``IMX_CCM_UART_HZ``
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The UART clock frequency in Hz (default is 24000000).
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``IMX_CCM_ECSPI_HZ``
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The ECSPI clock frequency in Hz (default is 67500000).
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``IMX_CCM_AHB_HZ``
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The AHB clock frequency in Hz (default is 135000000).
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``IMX_CCM_SDHCI_HZ``
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The SDHCI clock frequency in Hz (default is 196363000).
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Clock settings for different boards
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-----------------------------------
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The default clock settings are targeted for an i.MX 7Dual evaluation board using
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U-Boot. Some other boards with different boot loaders need different settings:
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* Phytec phyCORE-i.MX 6ULL (system on module) with MCIMX6Y2CVM08AB and a
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barebox bootloader (version ``2019.01.0-bsp-yocto-i.mx6ul-pd19.1.0``):
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* IMX_CCM_IPG_HZ=66000000
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* IMX_CCM_UART_HZ=80000000
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* IMX_CCM_AHB_HZ=66000000
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* IMX_CCM_SDHCI_HZ=198000000
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* IMX_CCM_ECSPI_HZ=60000000
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Boot via U-Boot
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---------------
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@ -65,6 +87,14 @@ The ``loadfdt`` command may be not defined in your U-Boot environment. Just
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replace it with the appropriate commands to load the device tree at
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``${fdt_addr}``.
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Boot via barebox
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----------------
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The same command like for U-Boot can be used to generate an application image.
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In a default configuration barebox expects an fdt image called `oftree` and a
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kernel image called `zImage` in the root folder of the bootable medium (e.g. an
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SD card).
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Clock Driver
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------------
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@ -133,6 +163,17 @@ system controls:
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A value of zero for the time or count disables the interrupt coalescing in the
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corresponding direction.
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On the Phytec phyCORE-i.MX 6ULL modules the PHY needs an initialization for the
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clock. A special PHY driver handles that (``ksz8091rnb``). Add it to your libbsd
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config like that:
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.. code-block:: c
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#define RTEMS_BSD_CONFIG_BSP_CONFIG
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#define RTEMS_BSD_CONFIG_INIT
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SYSINIT_DRIVER_REFERENCE(ksz8091rnb, miibus);
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#include <machine/rtems-bsd-config.h>
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MMC/SDCard Driver
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-----------------
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