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c-user: Add SMP implementation details section
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@ -333,44 +333,6 @@ of the OpenMP master thread that created it. In the scheduler instance
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``WRK1`` there are three thread pools available and their worker threads run at
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priority four.
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Thread Dispatch Details
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-----------------------
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This section gives background information to developers interested in the
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interrupt latencies introduced by thread dispatching. A thread dispatch
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consists of all work which must be done to stop the currently executing thread
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on a processor and hand over this processor to an heir thread.
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In SMP systems, scheduling decisions on one processor must be propagated
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to other processors through inter-processor interrupts. A thread dispatch
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which must be carried out on another processor does not happen instantaneously.
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Thus, several thread dispatch requests might be in the air and it is possible
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that some of them may be out of date before the corresponding processor has
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time to deal with them. The thread dispatch mechanism uses three per-processor
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variables,
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- the executing thread,
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- the heir thread, and
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- a boolean flag indicating if a thread dispatch is necessary or not.
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Updates of the heir thread are done via a normal store operation. The thread
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dispatch necessary indicator of another processor is set as a side-effect of an
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inter-processor interrupt. So, this change notification works without the use
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of locks. The thread context is protected by a TTAS lock embedded in the
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context to ensure that it is used on at most one processor at a time.
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Normally, only thread-specific or per-processor locks are used during a thread
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dispatch. This implementation turned out to be quite efficient and no lock
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contention was observed in the testsuite. The heavy-weight thread dispatch
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sequence is only entered in case the thread dispatch indicator is set.
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The context-switch is performed with interrupts enabled. During the transition
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from the executing to the heir thread neither the stack of the executing nor
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the heir thread must be used during interrupt processing. For this purpose a
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temporary per-processor stack is set up which may be used by the interrupt
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prologue before the stack is switched to the interrupt stack.
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Application Issues
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==================
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@ -562,6 +524,47 @@ on a suitable platform, e.g. QorIQ T4240. High-performance SMP applications
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need full control of the object storage :cite:`Drepper:2007:Memory`.
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Therefore, self-contained synchronization objects are now available for RTEMS.
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Implementation Details
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======================
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Thread Dispatch Details
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-----------------------
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This section gives background information to developers interested in the
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interrupt latencies introduced by thread dispatching. A thread dispatch
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consists of all work which must be done to stop the currently executing thread
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on a processor and hand over this processor to an heir thread.
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In SMP systems, scheduling decisions on one processor must be propagated
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to other processors through inter-processor interrupts. A thread dispatch
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which must be carried out on another processor does not happen instantaneously.
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Thus, several thread dispatch requests might be in the air and it is possible
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that some of them may be out of date before the corresponding processor has
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time to deal with them. The thread dispatch mechanism uses three per-processor
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variables,
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- the executing thread,
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- the heir thread, and
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- a boolean flag indicating if a thread dispatch is necessary or not.
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Updates of the heir thread are done via a normal store operation. The thread
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dispatch necessary indicator of another processor is set as a side-effect of an
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inter-processor interrupt. So, this change notification works without the use
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of locks. The thread context is protected by a TTAS lock embedded in the
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context to ensure that it is used on at most one processor at a time.
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Normally, only thread-specific or per-processor locks are used during a thread
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dispatch. This implementation turned out to be quite efficient and no lock
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contention was observed in the testsuite. The heavy-weight thread dispatch
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sequence is only entered in case the thread dispatch indicator is set.
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The context-switch is performed with interrupts enabled. During the transition
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from the executing to the heir thread neither the stack of the executing nor
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the heir thread must be used during interrupt processing. For this purpose a
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temporary per-processor stack is set up which may be used by the interrupt
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prologue before the stack is switched to the interrupt stack.
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Directives
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==========
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