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glossary: Add terms
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.. SPDX-License-Identifier: CC-BY-SA-4.0
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.. Copyright (C) 2022, 2023 Trinity College Dublin
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.. Copyright (C) 2020 Richi Dubey (richidubey@gmail.com)
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.. Copyright (C) 2015, 2023 embedded brains GmbH & Co. KG
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.. Copyright (C) 1988, 1998 On-Line Applications Research Corporation (OAR)
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@ -17,6 +18,9 @@ Glossary
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A term used to describe an object which has been created by an
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application.
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AMP
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This term is an acronym for Asymmetric Multiprocessing.
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APA
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This term is an acronym for Arbitrary Processor Affinity. APA schedulers
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allow a thread to have an arbitrary affinity to a processor set, rather than
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@ -357,6 +361,10 @@ Glossary
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mathematically intensive situations. It is typically viewed as a logical
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extension of the primary processor.
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formal model
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A model of a computing component (hardware or software) that has a
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mathematically based :term:`semantics`.
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freed
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A resource that has been released by the application to RTEMS.
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@ -386,6 +394,18 @@ Glossary
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GNU
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This term is an acronym for `GNU's Not Unix <https://www.gnu.org/>`_.
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GPL
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This term is an acronym for
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`GNU General Public License <https://www.gnu.org/licenses>`__.
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GPLv2
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This term is an acronym for
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`GNU General Public License Version 2 <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>`__.
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GPLv3
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This term is an acronym for
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`GNU General Public License Version 3 <https://www.gnu.org/licenses/gpl-3.0.html>`__.
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GR712RC
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The
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`GR712RC <https://www.gaisler.com/index.php/products/components/gr712rc>`_
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@ -511,6 +531,10 @@ Glossary
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LIFO
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This term is an acronym for :term:`Last In First Out`.
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Linear Temporal Logic
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This is a logic that states properties about (possibly infinite) sequences of
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states.
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list
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A data structure which allows for dynamic addition and removal of
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entries. It is not statically limited to a particular size.
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@ -520,6 +544,12 @@ Glossary
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are arranged such that the least significant byte is at the lowest
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address.
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LLVM
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This term is an acronym for
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`Low Level Virtual Machine <https://www.llvm.org>`__.
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The LLVM Project is a collection of modular and reusable compiler and
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toolchain technologies.
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local
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An object which was created with the LOCAL attribute and is accessible
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only on the node it was created and resides upon. In a single processor
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@ -541,6 +571,9 @@ Glossary
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A :term:`task` ``L`` has a lower :term:`priority` than a task ``H``, if
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task ``L`` is less important than task ``H``.
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LTL
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This term is an acronym for :term:`Linear Temporal Logic`.
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major number
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The index of a device driver in the Device Driver Table.
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@ -632,6 +665,9 @@ Glossary
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mathematically intensive situations. It is typically viewed as a logical
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extension of the primary processor.
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OBC
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This term is an acronym for On-Board Computer.
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object
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In this document, this term is used to refer collectively to tasks,
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timers, message queues, partitions, regions, semaphores, ports, and rate
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@ -806,6 +842,10 @@ Glossary
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A term used to describe routines which do not modify themselves or global
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variables.
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refinement
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A *refinement* is a relationship between a specification and its
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implementation as code.
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region
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An RTEMS object which is used to allocate and deallocate variable size
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blocks of memory from a dynamically specified area of memory.
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@ -818,6 +858,9 @@ Glossary
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Registers are locations physically located within a component, typically
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used for device control or general purpose storage.
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reification
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Another term used to denote :term:`refinement`.
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remote
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Any object that does not reside on the local node.
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@ -865,6 +908,12 @@ Glossary
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The state of a rate monotonic timer while it is being used to delineate a
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period. The timer exits this state by either expiring or being canceled.
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scenario
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In the context of formal verification, in a setting that involves many
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concurrent tasks that interleave in arbitrary ways, a scenario describes a
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single specific possible interleaving. One interpretation of the behaviour
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of a concurrent system is the set of all its scenarios.
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schedulable
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A set of tasks which can be guaranteed to meet their deadlines based upon
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a specific scheduling algorithm.
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@ -901,6 +950,11 @@ Glossary
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segments
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Variable sized memory blocks allocated from a region.
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semantics
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This term refers to the meaning of text or utterances in some language. In a
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software engineering context these will be programming, modelling or
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specification languages.
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semaphore
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An RTEMS object which is used to synchronize tasks and provide mutually
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exclusive access to resources.
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@ -168,7 +168,7 @@ in such a way that tests can be generated using the SPIN model checker
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Promela is quite a low-level modelling language that makes it easy to get close
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to code level, and is specifically targeted to modelling software. It is one of
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the most widely used model-checkers, both in industry and education. It uses
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assertions, and :term:`Linear Temporal Logic` (LTL) to express properties of
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assertions, and :term:`Linear Temporal Logic` (:term:`LTL`) to express properties of
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interest.
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Given a Promela model that checks key properties successfully,
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@ -30,9 +30,9 @@ such as a specification. This relationship is commonly referred to as a
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Often it is quite difficult to get a useful formal model of real code. Some
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formal modelling approaches are capable of generating machine-readable
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:term:`scenarios` that describe possible correct behaviors of the system at the
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relevant level of abstraction. A refinement for these can be defined by
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using them to generate test code.
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:term:`scenarios <scenario>` that describe possible correct behaviors of the
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system at the relevant level of abstraction. A refinement for these can be
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defined by using them to generate test code.
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This is the technique that is used in :ref:`FormalVerifMethodology` to
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verify parts of RTEMS. Formal models are constructed based on requirements
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documentation, and are used as a basis for test generation.
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@ -1,5 +1,6 @@
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.. SPDX-License-Identifier: CC-BY-SA-4.0
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.. Copyright (C) 2022, 2023 Trinity College Dublin
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.. Copyright (C) 2017, 2019 embedded brains GmbH & Co. KG
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.. Copyright (C) 1988, 1998 On-Line Applications Research Corporation (OAR)
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@ -39,6 +40,10 @@ Glossary
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This term is an acronym for
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`Executable and Linkable Format <https://en.wikipedia.org/wiki/Executable_and_Linkable_Format>`_.
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formal model
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A model of a computing component (hardware or software) that has a
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mathematically based :term:`semantics`.
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GCC
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This term is an acronym for `GNU Compiler Collection <https://gcc.gnu.org/>`_.
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@ -64,15 +69,15 @@ Glossary
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This term is an acronym for Independent Software Verification and Validation.
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Linear Temporal Logic
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This is a logic that states properties about
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(possibly infinite) sequences of states.
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This is a logic that states properties about (possibly infinite) sequences of
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states.
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LTL
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This term is an acronym for Linear Temporal Logic.
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This term is an acronym for :term:`Linear Temporal Logic`.
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refinement
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A *refinement* is a relationship between a specification
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and its implementation as code.
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A *refinement* is a relationship between a specification and its
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implementation as code.
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reification
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Another term used to denote :term:`refinement`.
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@ -84,6 +89,17 @@ Glossary
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RTEMS
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This term is an acronym for Real-Time Executive for Multiprocessor Systems.
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scenario
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In the context of formal verification, in a setting that involves many
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concurrent tasks that interleave in arbitrary ways, a scenario describes a
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single specific possible interleaving. One interpretation of the behaviour
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of a concurrent system is the set of all its scenarios.
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semantics
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This term refers to the meaning of text or utterances in some language. In a
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software engineering context these will be programming, modelling or
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specification languages.
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software component
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This term is defined by ECSS-E-ST-40C 3.2.28 as a "part of a software
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system". For this project a *software component* shall be any of the
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