This patch adds the documentation for building and running RTEMS on the Kendryte K210 RISC-V SoC.
The generic riscv introducion was re-arranged to list the multilib variants then the specific
hardware targets. In addition a couple of errors were fixed for the generic QEMU commands.
V2 corrected a typo, expanded K210 Console UART parameters, and addded a hyperlink to renode.io install
instructions.
V3 clarified the multilib variant description, clarified the multilib variant reference platform, and
corrected capitalization on SiFive.
V4 improves the instructions for running the K210 BSP on the Renode.io simulator.
V5 cleaned up the text to be no more than 80 characters per line.
V6 applied word wrap to paragraphs and replaced hard coded RTEMS major versions with macros.
Closes#4876
This patch adds the documentation for building and running RTEMS on the Kendryte K210
RISC-V SoC. The generic riscv introducion was re-arranged to list the multilib variants
then the specific hardware targets. In addition a couple of errors were fixed for the
generic QEMU commands.
V2 corrected a typo, expanded K210 Console UART parameters, and addded a hyperlink
to renode.io install instructions.
Closes#4876
Casting the node returned by rtems_chain_head is incorrect. That node is
owned by the control structure and use of it post-cast could cause
memory corruption. Instead, use rtems_chain_first which returns the
node after the head node. This also corrects node->next to
rtems_chain_next(node) which makes better use of the API.
This commit already clarified that the defines of the removed section
are optional BSP provided default values and not application
configuration options:
commit cf9f2121577b11f8eab5e49c48173c46cf09c627
Author: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Wed Nov 17 08:46:56 2021 +0100
c-user: Clarify BSP related configuration settings
The BSP is capable of initialising the hardware being the first software
that takes control on hardware reset (after the bootrom). For instance,
using on QEMU's virt platforms, RTEMS runs as a bios without BBL.
Similarily, RTEMS can also be run on harware/FPGA and loaded using
GDB; the bootrom (or a GDB script) should just set the a0/a1 registers
with the boot HART ID and DTB address respectively.
This patch adds details on the packages needed for the RTEMS
source builder on openSUSE Leap 15.4 64 bit. The commands
were tested on a new install with the RTEMS source builder
master branch.
Update the riscv documentation for the Microchip PolarFire SoC
BSP variant including information about SMP test procedure
for the Microchip PolarFire Icicle Kit.
