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92 lines
2.2 KiB
ReStructuredText
92 lines
2.2 KiB
ReStructuredText
.. SPDX-License-Identifier: CC-BY-SA-4.0
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.. Copyright (C) 2015 Hesham Almatary
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.. Copyright (C) 1988, 2002 On-Line Applications Research Corporation (OAR)
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Epiphany Specific Information
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*****************************
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This chapter discusses the`Epiphany Architecture
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http://adapteva.com/docs/epiphany_sdk_ref.pdf dependencies in this port of
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RTEMS. Epiphany is a chip that can come with 16 and 64 cores, each of which can
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run RTEMS separately or they can work together to run a SMP RTEMS application.
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**Architecture Documents**
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For information on the Epiphany architecture refer to the *Epiphany
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Architecture Reference* http://adapteva.com/docs/epiphany_arch_ref.pdf.
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Calling Conventions
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===================
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Please refer to the *Epiphany SDK*
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http://adapteva.com/docs/epiphany_sdk_ref.pdf Appendix A: Application Binary
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Interface
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Floating Point Unit
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-------------------
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A floating point unit is currently not supported.
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Memory Model
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============
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A flat 32-bit memory model is supported, no caches. Each core has its own 32
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KiB strictly ordered local memory along with an access to a shared 32 MiB
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external DRAM.
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Interrupt Processing
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====================
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Every Epiphany core has 10 exception types:
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- Reset
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- Software Exception
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- Data Page Fault
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- Timer 0
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- Timer 1
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- Message Interrupt
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- DMA0 Interrupt
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- DMA1 Interrupt
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- WANT Interrupt
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- User Interrupt
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Interrupt Levels
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----------------
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There are only two levels: interrupts enabled and interrupts disabled.
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Interrupt Stack
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---------------
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The Epiphany RTEMS port uses a dedicated software interrupt stack. The stack
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for interrupts is allocated during interrupt driver initialization. When an
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interrupt is entered, the _ISR_Handler routine is responsible for switching
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from the interrupted task stack to RTEMS software interrupt stack.
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Default Fatal Error Processing
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==============================
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The default fatal error handler for this architecture performs the following
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actions:
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- disables operating system supported interrupts (IRQ),
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- places the error code in ``r0``, and
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- executes an infinite loop to simulate a halt processor instruction.
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Symmetric Multiprocessing
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=========================
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SMP is not supported.
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