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191 lines
5.7 KiB
ReStructuredText
191 lines
5.7 KiB
ReStructuredText
.. SPDX-License-Identifier: CC-BY-SA-4.0
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.. Copyright (C) 2017, 2019 embedded brains GmbH
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.. Copyright (C) 2017, 2019 Sebastian Huber
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imx (NXP i.MX)
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==============
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This BSP offers only one variant, the `imx7`. This variant supports the i.MX
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7Dual processor and the i.MX 6UL/ULL processor family (with slightly different
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clock settings). The basic hardware initialization is not performed by the BSP.
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A boot loader with device tree support must be used to start the BSP, e.g.
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U-Boot or barebox.
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Build Configuration Options
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---------------------------
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The following options are available at the configure command line.
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``BSP_PRESS_KEY_FOR_RESET``
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If defined to a non-zero value, then print a message and wait until pressed
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before resetting board when application terminates.
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``BSP_RESET_BOARD_AT_EXIT``
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If defined to a non-zero value, then reset the board when the application
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terminates.
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``BSP_PRINT_EXCEPTION_CONTEXT``
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If defined to a non-zero value, then print the exception context when an
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unexpected exception occurs.
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``BSP_FDT_BLOB_SIZE_MAX``
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The maximum size of the device tree blob in bytes (default is 262144).
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``CONSOLE_USE_INTERRUPTS``
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Use interrupt driven mode for console devices (enabled by default).
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``IMX_CCM_IPG_HZ``
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The IPG clock frequency in Hz (default is 67500000).
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``IMX_CCM_UART_HZ``
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The UART clock frequency in Hz (default is 24000000).
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``IMX_CCM_ECSPI_HZ``
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The ECSPI clock frequency in Hz (default is 67500000).
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``IMX_CCM_AHB_HZ``
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The AHB clock frequency in Hz (default is 135000000).
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``IMX_CCM_SDHCI_HZ``
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The SDHCI clock frequency in Hz (default is 196363000).
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Clock settings for different boards
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-----------------------------------
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The default clock settings are targeted for an i.MX 7Dual evaluation board using
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U-Boot. Some other boards with different boot loaders need different settings:
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* Phytec phyCORE-i.MX 6ULL (system on module) with MCIMX6Y2CVM08AB and a
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barebox bootloader (version ``2019.01.0-bsp-yocto-i.mx6ul-pd19.1.0``):
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* IMX_CCM_IPG_HZ=66000000
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* IMX_CCM_UART_HZ=80000000
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* IMX_CCM_AHB_HZ=66000000
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* IMX_CCM_SDHCI_HZ=198000000
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* IMX_CCM_ECSPI_HZ=60000000
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Boot via U-Boot
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---------------
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The application executable file (ELF file) must be converted to an U-Boot
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image. Use the following commands:
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.. code-block:: none
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arm-rtems5-objcopy -O binary app.exe app.bin
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gzip -9 -f -c app.bin > app.bin.gz
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mkimage -A arm -O linux -T kernel -a 0x80200000 -e 0x80200000 -n RTEMS -d app.bin.gz app.img
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Use the following U-Boot commands to boot an application via TFTP download:
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.. code-block:: none
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tftpboot ${loadaddr} app.img && run loadfdt && bootm ${loadaddr} - ${fdt_addr} ; reset
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The ``loadfdt`` command may be not defined in your U-Boot environment. Just
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replace it with the appropriate commands to load the device tree at
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``${fdt_addr}``.
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Boot via barebox
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----------------
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The same command like for U-Boot can be used to generate an application image.
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In a default configuration barebox expects an fdt image called `oftree` and a
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kernel image called `zImage` in the root folder of the bootable medium (e.g. an
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SD card).
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Clock Driver
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------------
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The clock driver uses the `ARMv7-AR Generic Timer`.
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Console Driver
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--------------
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The console driver supports up to seven on-chip UARTs. They are initialized
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according to the device tree. The console driver does not configure the pins.
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I2C Driver
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----------
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I2C drivers are registered by the ``i2c_bus_register_imx()`` function. The I2C
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driver does not configure the pins.
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.. code-block:: c
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#include <assert.h>
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#include <bsp.h>
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void i2c_init(void)
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{
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int rv;
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rv = i2c_bus_register_imx("/dev/i2c-0", "i2c0");
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assert(rv == 0);
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}
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SPI Driver
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----------
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SPI drivers are registered by the ``spi_bus_register_imx()`` function. The SPI
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driver configures the pins according to the ``pinctrl-0`` device tree property.
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SPI transfers with a continuous chip select are limited by the FIFO size of 64
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bytes. The driver has no DMA support.
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.. code-block:: c
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#include <assert.h>
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#include <bsp.h>
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void spi_init(void)
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{
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int rv;
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rv = spi_bus_register_imx("/dev/spi-0", "spi0");
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assert(rv == 0);
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}
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Network Interface Driver
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------------------------
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The network interface driver is provided by the `libbsd`. It is initialized
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according to the device tree. It supports checksum offload and interrupt
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coalescing. IPv6 transmit checksum offload is not implemented. The interrupt
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coalescing uses the MII/GMII clocks and can be controlled by the following
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system controls:
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* ``dev.ffec.<unit>.int_coal.rx_time``
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* ``dev.ffec.<unit>.int_coal.rx_count``
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* ``dev.ffec.<unit>.int_coal.tx_time``
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* ``dev.ffec.<unit>.int_coal.tx_count``
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A value of zero for the time or count disables the interrupt coalescing in the
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corresponding direction.
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On the Phytec phyCORE-i.MX 6ULL modules the PHY needs an initialization for the
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clock. A special PHY driver handles that (``ksz8091rnb``). Add it to your libbsd
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config like that:
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.. code-block:: c
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#define RTEMS_BSD_CONFIG_BSP_CONFIG
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#define RTEMS_BSD_CONFIG_INIT
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SYSINIT_DRIVER_REFERENCE(ksz8091rnb, miibus);
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#include <machine/rtems-bsd-config.h>
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MMC/SDCard Driver
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-----------------
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The MMC/SDCard driver (uSDHC module) is provided by the `libbsd`. It is
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initialized according to the device tree. Pin re-configuration according to
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the serial clock frequency is not supported. Data transfers are extremely
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slow. This is probably due to the missing DMA support.
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Caveats
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-------
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The clock and pin configuration support is quite rudimentary and mostly relies
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on the boot loader. For a pin group configuration see
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``imx_iomux_configure_pins()``. There is no power management support.
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