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ReStructuredText
135 lines
4.1 KiB
ReStructuredText
.. SPDX-License-Identifier: CC-BY-SA-4.0
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.. Copyright (C) 1988, 2006 On-Line Applications Research Corporation (OAR)
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Atmel AVR Specific Information
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******************************
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This chapter discusses the AVR architecture dependencies in this port of RTEMS.
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**Architecture Documents**
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For information on the AVR architecture, refer to the following documents
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available from Atmel.
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TBD
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- See other CPUs for documentation reference formatting examples.
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CPU Model Dependent Features
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============================
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CPUs of the AVR 53X only differ in the peripherals and thus in the device
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drivers. This port does not yet support the 56X dual core variants.
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Count Leading Zeroes Instruction
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--------------------------------
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The AVR CPU has the XXX instruction which could be used to speed up the find
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first bit operation. The use of this instruction should significantly speed up
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the scheduling associated with a thread blocking.
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Calling Conventions
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===================
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Processor Background
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--------------------
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The AVR architecture supports a simple call and return mechanism. A subroutine
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is invoked via the call (``call``) instruction. This instruction saves the
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return address in the ``RETS`` register and transfers the execution to the
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given address.
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It is the called funcions responsability to use the link instruction to reserve
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space on the stack for the local variables. Returning from a subroutine is
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done by using the RTS (``RTS``) instruction which loads the PC with the adress
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stored in RETS.
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It is is important to note that the ``call`` instruction does not automatically
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save or restore any registers. It is the responsibility of the high-level
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language compiler to define the register preservation and usage convention.
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Register Usage
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--------------
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A called function may clobber all registers, except RETS, R4-R7, P3-P5, FP and
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SP. It may also modify the first 12 bytes in the caller's stack frame which is
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used as an argument area for the first three arguments (which are passed in
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R0...R3 but may be placed on the stack by the called function).
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Parameter Passing
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-----------------
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RTEMS assumes that the AVR GCC calling convention is followed. The first three
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parameters are stored in registers R0, R1, and R2. All other parameters are
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put pushed on the stack. The result is returned through register R0.
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Memory Model
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============
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The AVR family architecutre support a single unified 4 GB byte address space
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using 32-bit addresses. It maps all resources like internal and external memory
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and IO registers into separate sections of this common address space.
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The AVR architcture supports some form of memory protection via its Memory
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Management Unit. Since the AVR port runs in supervisior mode this memory
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protection mechanisms are not used.
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Interrupt Processing
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====================
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Discussed in this chapter are the AVR's interrupt response and control
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mechanisms as they pertain to RTEMS.
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Vectoring of an Interrupt Handler
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---------------------------------
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TBD
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Disabling of Interrupts by RTEMS
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--------------------------------
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During interrupt disable critical sections, RTEMS disables interrupts to level
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N (N) before the execution of this section and restores them to the previous
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level upon completion of the section. RTEMS uses the instructions CLI and STI
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to enable and disable Interrupts. Emulation, Reset, NMI and Exception
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Interrupts are never disabled.
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Interrupt Stack
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---------------
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The AVR Architecture works with two different kind of stacks, User and
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Supervisor Stack. Since RTEMS and its Application run in supervisor mode, all
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interrupts will use the interrupted tasks stack for execution.
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Default Fatal Error Processing
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==============================
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The default fatal error handler for the AVR performs the following
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actions:
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- disables processor interrupts,
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- places the error code in *r0*, and
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- executes an infinite loop (``while(0);`` to
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simulate a halt processor instruction.
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Symmetric Multiprocessing
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=========================
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SMP is not supported.
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Thread-Local Storage
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====================
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Thread-local storage is not supported due to a broken tool chain.
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Board Support Packages
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======================
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System Reset
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------------
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TBD
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