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317 lines
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ReStructuredText
317 lines
13 KiB
ReStructuredText
Board Support Packages
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######################
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.. index:: Board Support Packages
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.. index:: BSPs
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Introduction
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============
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.. index:: BSP, definition
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A board support package (BSP) is a collection of
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user-provided facilities which interface RTEMS and an
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application with a specific hardware platform. These facilities
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may include hardware initialization, device drivers, user
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extensions, and a Multiprocessor Communications Interface
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(MPCI). However, a minimal BSP need only support processor
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reset and initialization and, if needed, a clock tick.
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Reset and Initialization
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========================
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An RTEMS based application is initiated or
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re-initiated when the processor is reset. This initialization
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code is responsible for preparing the target platform for the
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RTEMS application. Although the exact actions performed by the
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initialization code are highly processor and target dependent,
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the logical functionality of these actions are similar across a
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variety of processors and target platforms.
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Normally, the BSP and some of the application initialization is
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intertwined in the RTEMS initialization sequence controlled by
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the shared function ``boot_card()``.
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The reset application initialization code is executed
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first when the processor is reset. All of the hardware must be
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initialized to a quiescent state by this software before
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initializing RTEMS. When in quiescent state, devices do not
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generate any interrupts or require any servicing by the
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application. Some of the hardware components may be initialized
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in this code as well as any application initialization that does
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not involve calls to RTEMS directives.
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The processor’s Interrupt Vector Table which will be used by the
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application may need to be set to the required value by the reset
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application initialization code. Because interrupts are enabled
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automatically by RTEMS as part of the context switch to the first task,
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the Interrupt Vector Table MUST be set before this directive is invoked
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to ensure correct interrupt vectoring. The processor’s Interrupt Vector
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Table must be accessible by RTEMS as it will be modified by the when
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installing user Interrupt Service Routines (ISRs) On some CPUs, RTEMS
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installs it’s own Interrupt Vector Table as part of initialization and
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thus these requirements are met automatically. The reset code which is
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executed before the call to any RTEMS initialization routines has the
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following requirements:
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- Must not make any blocking RTEMS directive calls.
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- If the processor supports multiple privilege levels, must leave
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the processor in the most privileged, or supervisory, state.
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- Must allocate a stack of sufficient size to execute the initialization
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and shutdown of the system. This stack area will NOT be used by any task
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once the system is initialized. This stack is often reserved via the
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linker script or in the assembly language start up file.
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- Must initialize the stack pointer for the initialization process to
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that allocated.
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- Must initialize the processor’s Interrupt Vector Table.
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- Must disable all maskable interrupts.
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- If the processor supports a separate interrupt stack, must allocate
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the interrupt stack and initialize the interrupt stack pointer.
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At the end of the initialization sequence, RTEMS does not return to the
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BSP initialization code, but instead context switches to the highest
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priority task to begin application execution. This task is typically
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a User Initialization Task which is responsible for performing both
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local and global application initialization which is dependent on RTEMS
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facilities. It is also responsible for initializing any higher level
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RTEMS services the application uses such as networking and blocking
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device drivers.
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Interrupt Stack Requirements
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----------------------------
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The worst-case stack usage by interrupt service
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routines must be taken into account when designing an
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application. If the processor supports interrupt nesting, the
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stack usage must include the deepest nest level. The worst-case
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stack usage must account for the following requirements:
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- Processor’s interrupt stack frame
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- Processor’s subroutine call stack frame
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- RTEMS system calls
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- Registers saved on stack
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- Application subroutine calls
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The size of the interrupt stack must be greater than or equal to the
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confugured minimum stack size.
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Processors with a Separate Interrupt Stack
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------------------------------------------
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Some processors support a separate stack for interrupts. When an
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interrupt is vectored and the interrupt is not nested, the processor
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will automatically switch from the current stack to the interrupt stack.
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The size of this stack is based solely on the worst-case stack usage by
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interrupt service routines.
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The dedicated interrupt stack for the entire application on some
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architectures is supplied and initialized by the reset and initialization
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code of the user’s Board Support Package. Whether allocated and
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initialized by the BSP or RTEMS, since all ISRs use this stack, the
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stack size must take into account the worst case stack usage by any
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combination of nested ISRs.
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Processors Without a Separate Interrupt Stack
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---------------------------------------------
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Some processors do not support a separate stack for interrupts. In this
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case, without special assistance every task’s stack must include
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enough space to handle the task’s worst-case stack usage as well as
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the worst-case interrupt stack usage. This is necessary because the
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worst-case interrupt nesting could occur while any task is executing.
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On many processors without dedicated hardware managed interrupt stacks,
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RTEMS manages a dedicated interrupt stack in software. If this capability
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is supported on a CPU, then it is logically equivalent to the processor
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supporting a separate interrupt stack in hardware.
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Device Drivers
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==============
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Device drivers consist of control software for
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special peripheral devices and provide a logical interface for
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the application developer. The RTEMS I/O manager provides
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directives which allow applications to access these device
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drivers in a consistent fashion. A Board Support Package may
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include device drivers to access the hardware on the target
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platform. These devices typically include serial and parallel
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ports, counter/timer peripherals, real-time clocks, disk
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interfaces, and network controllers.
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For more information on device drivers, refer to the
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I/O Manager chapter.
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Clock Tick Device Driver
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------------------------
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Most RTEMS applications will include a clock tick
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device driver which invokes the ``rtems_clock_tick``
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directive at regular intervals. The clock tick is necessary if
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the application is to utilize timeslicing, the clock manager, the
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timer manager, the rate monotonic manager, or the timeout option on blocking
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directives.
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The clock tick is usually provided as an interrupt from a counter/timer
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or a real-time clock device. When a counter/timer is used to provide the
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clock tick, the device is typically programmed to operate in continuous
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mode. This mode selection causes the device to automatically reload the
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initial count and continue the countdown without programmer intervention.
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This reduces the overhead required to manipulate the counter/timer in
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the clock tick ISR and increases the accuracy of tick occurrences.
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The initial count can be based on the microseconds_per_tick field
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in the RTEMS Configuration Table. An alternate approach is to set
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the initial count for a fixed time period (such as one millisecond)
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and have the ISR invoke ``rtems_clock_tick`` on the
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configured ``microseconds_per_tick`` boundaries. Obviously, this
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can induce some error if the configured ``microseconds_per_tick``
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is not evenly divisible by the chosen clock interrupt quantum.
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It is important to note that the interval between
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clock ticks directly impacts the granularity of RTEMS timing
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operations. In addition, the frequency of clock ticks is an
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important factor in the overall level of system overhead. A
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high clock tick frequency results in less processor time being
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available for task execution due to the increased number of
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clock tick ISRs.
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User Extensions
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===============
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RTEMS allows the application developer to augment
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selected features by invoking user-supplied extension routines
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when the following system events occur:
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- Task creation
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- Task initiation
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- Task reinitiation
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- Task deletion
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- Task context switch
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- Post task context switch
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- Task begin
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- Task exits
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- Fatal error detection
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User extensions can be used to implement a wide variety of
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functions including execution profiling, non-standard
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coprocessor support, debug support, and error detection and
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recovery. For example, the context of a non-standard numeric
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coprocessor may be maintained via the user extensions. In this
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example, the task creation and deletion extensions are
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responsible for allocating and deallocating the context area,
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the task initiation and reinitiation extensions would be
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responsible for priming the context area, and the task context
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switch extension would save and restore the context of the
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device.
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For more information on user extensions, refer to `User Extensions Manager`_.
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Multiprocessor Communications Interface (MPCI)
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==============================================
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RTEMS requires that an MPCI layer be provided when a
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multiple node application is developed. This MPCI layer must
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provide an efficient and reliable communications mechanism
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between the multiple nodes. Tasks on different nodes
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communicate and synchronize with one another via the MPCI. Each
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MPCI layer must be tailored to support the architecture of the
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target platform.
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For more information on the MPCI, refer to the
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Multiprocessing Manager chapter.
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Tightly-Coupled Systems
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-----------------------
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A tightly-coupled system is a multiprocessor
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configuration in which the processors communicate solely via
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shared global memory. The MPCI can simply place the RTEMS
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packets in the shared memory space. The two primary
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considerations when designing an MPCI for a tightly-coupled
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system are data consistency and informing another node of a
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packet.
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The data consistency problem may be solved using
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atomic "test and set" operations to provide a "lock" in the
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shared memory. It is important to minimize the length of time
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any particular processor locks a shared data structure.
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The problem of informing another node of a packet can
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be addressed using one of two techniques. The first technique
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is to use an interprocessor interrupt capability to cause an
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interrupt on the receiving node. This technique requires that
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special support hardware be provided by either the processor
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itself or the target platform. The second technique is to have
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a node poll for arrival of packets. The drawback to this
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technique is the overhead associated with polling.
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Loosely-Coupled Systems
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-----------------------
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A loosely-coupled system is a multiprocessor
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configuration in which the processors communicate via some type
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of communications link which is not shared global memory. The
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MPCI sends the RTEMS packets across the communications link to
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the destination node. The characteristics of the communications
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link vary widely and have a significant impact on the MPCI
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layer. For example, the bandwidth of the communications link
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has an obvious impact on the maximum MPCI throughput.
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The characteristics of a shared network, such as
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Ethernet, lend themselves to supporting an MPCI layer. These
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networks provide both the point-to-point and broadcast
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capabilities which are expected by RTEMS.
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Systems with Mixed Coupling
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---------------------------
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A mixed-coupling system is a multiprocessor
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configuration in which the processors communicate via both
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shared memory and communications links. A unique characteristic
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of mixed-coupling systems is that a node may not have access to
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all communication methods. There may be multiple shared memory
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areas and communication links. Therefore, one of the primary
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functions of the MPCI layer is to efficiently route RTEMS
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packets between nodes. This routing may be based on numerous
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algorithms. In addition, the router may provide alternate
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communications paths in the event of an overload or a partial
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failure.
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Heterogeneous Systems
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---------------------
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Designing an MPCI layer for a heterogeneous system
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requires special considerations by the developer. RTEMS is
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designed to eliminate many of the problems associated with
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sharing data in a heterogeneous environment. The MPCI layer
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need only address the representation of thirty-two (32) bit
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unsigned quantities.
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For more information on supporting a heterogeneous
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system, refer the Supporting Heterogeneous Environments in the
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Multiprocessing Manager chapter.
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.. COMMENT: COPYRIGHT (c) 1988-2002.
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.. COMMENT: On-Line Applications Research Corporation (OAR).
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.. COMMENT: All rights reserved.
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