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80 lines
2.1 KiB
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80 lines
2.1 KiB
ReStructuredText
.. comment SPDX-License-Identifier: CC-BY-SA-4.0
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.. COMMENT: Copyright (c) 2018
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.. COMMENT: embedded brains GmbH
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.. COMMENT: All rights reserved.
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RISC-V Specific Information
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***************************
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Calling Conventions
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===================
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Please refer to the
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`RISC-V ELF psABI specification <https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md>`_.
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Multilibs
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=========
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The GCC for RISC-V can generate code for several 32-bit and 64-bit ISA/ABI
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variants. The following multilibs are available:
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* ``.``: The default multilib ISA is RV32IMAFDC with ABI ILP32D.
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* ``rv32i/ilp32``: ISA RV32I with ABI ILP32.
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* ``rv32im/ilp32``: ISA RV32IM with ABI ILP32.
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* ``rv32imafd/ilp32d``: ISA RV32IMAFD with ABI ILP32D.
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* ``rv32iac/ilp32``: ISA RV32IAC with ABI ILP32.
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* ``rv32imac/ilp32``: ISA RV32IMAC with ABI ILP32.
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* ``rv32imafc/ilp32f``: ISA RV32IMAFC with ABI ILP32F.
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* ``rv64imafd/lp64d``: ISA RV64IMAFD with ABI LP64D and code model medlow.
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* ``rv64imafd/lp64d/medany``: ISA RV64IMAFD with ABI LP64D and code model medany.
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* ``rv64imac/lp64``: ISA RV64IMAC with ABI LP64 and code model medlow.
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* ``rv64imac/lp64/medany``: ISA RV64IMAC with ABI LP64 and code model medany.
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* ``rv64imafdc/lp64d``: ISA RV64IMAFDC with ABI LP64D and code model medlow.
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* ``rv64imafdc/lp64d/medany``: ISA RV64IMAFDC with ABI LP64D and code model medany.
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Interrupt Processing
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====================
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Interrupt exceptions are handled via the interrupt extensions API. All other
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exceptions end up in a fatal error (RTEMS_FATAL_SOURCE_EXCEPTION).
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Interrupt Levels
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----------------
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There are exactly two interrupt levels on RISC-V with respect to RTEMS. Level
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zero corresponds to machine interrupts enabled. Level one corresponds to
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machine interrupts disabled.
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Interrupt Stack
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---------------
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The memory region for the interrupt stack is defined by the BSP.
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Default Fatal Error Processing
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==============================
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The default fatal error is BSP-specific.
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Symmetric Multiprocessing
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=========================
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SMP is supported.
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Thread-Local Storage
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====================
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Thread-local storage is supported.
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