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.. comment SPDX-License-Identifier: CC-BY-SA-4.0
==============================================
RTEMS CPU Architecture Supplement (|version|).
==============================================
| **COPYRIGHT (c) 1988 - 2015.**
| **On-Line Applications Research Corporation (OAR).**
| **COPYRIGHT (c) 2016-2018.**
| **RTEMS Foundation, The RTEMS Documentation Project**
| **Licenses:**
| Creative Commons Attribution-ShareAlike 4.0 International Public License
| https://creativecommons.org/licenses/by-sa/4.0/legalcode
The authors have used their best efforts in preparing this material. These
efforts include the development, research, and testing of the theories and
programs to determine their effectiveness. No warranty of any kind, expressed
or implied, with regard to the software or the material contained in this
document is provided. No liability arising out of the application or use of
any product described in this document is assumed. The authors reserve the
right to revise this material and to make changes from time to time in the
content hereof without obligation to notify anyone of such revision or changes.
The RTEMS Project is hosted at http://www.rtems.org/. Any inquiries concerning
RTEMS, its related support components, or its documentation should be directed
to the Community Project hosted at http://www.rtems.org/.
.. topic:: RTEMS Online Resources
================ =============================
Home https://www.rtems.org/
Developers https://devel.rtems.org/
Documentation https://docs.rtems.org/
Bug Reporting https://devel.rtems.org/query
Mailing Lists https://lists.rtems.org/
Git Repositories https://git.rtems.org/
================ =============================
.. toctree::
:maxdepth: 5
:numbered:
preface
port
arm
atmel_avr
blackfin
ephiphany
intel_amd_x86
lattice_micro32
renesas_m32c
m68xxx_and_coldfire
xilinx_microblaze
mips
altera_nios_ii
openrisc_1000
powerpc
riscv
superh
sparc
sparc64
zreferences
* :ref:`genindex`