mirror of
https://git.rtems.org/rtems-libbsd/
synced 2025-05-13 01:57:43 +08:00
i386: Add missing files from FreeBSD
- Files needed to make rtems-libbsd build again for i386
This commit is contained in:
parent
65a0afdd62
commit
0bd7949124
6
freebsd/sys/i386/include/machine/bus.h
Normal file
6
freebsd/sys/i386/include/machine/bus.h
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@ -0,0 +1,6 @@
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/*-
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* This file is in the public domain.
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*/
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/* $FreeBSD$ */
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#include <x86/bus.h>
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175
freebsd/sys/x86/include/machine/intr_machdep.h
Normal file
175
freebsd/sys/x86/include/machine/intr_machdep.h
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@ -0,0 +1,175 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef __X86_INTR_MACHDEP_H__
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#define __X86_INTR_MACHDEP_H__
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#ifdef _KERNEL
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/*
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* Values used in determining the allocation of IRQ values among
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* different types of I/O interrupts. These values are used as
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* indices into a interrupt source array to map I/O interrupts to a
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* device interrupt source whether it be a pin on an interrupt
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* controller or an MSI interrupt. The 16 ISA IRQs are assigned fixed
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* IDT vectors, but all other device interrupts allocate IDT vectors
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* on demand. Currently we have 191 IDT vectors available for device
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* interrupts on each CPU. On many systems with I/O APICs, a lot of
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* the IRQs are not used, so the total number of IRQ values reserved
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* can exceed the number of available IDT slots.
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*
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* The first 16 IRQs (0 - 15) are reserved for ISA IRQs. Interrupt
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* pins on I/O APICs for non-ISA interrupts use IRQ values starting at
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* IRQ 17. This layout matches the GSI numbering used by ACPI so that
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* IRQ values returned by ACPI methods such as _CRS can be used
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* directly by the ACPI bus driver.
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*
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* MSI interrupts allocate a block of interrupts starting at the end
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* of the I/O APIC range. When running under the Xen Hypervisor, an
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* additional range of IRQ values are available for binding to event
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* channel events.
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*/
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extern u_int first_msi_irq;
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extern u_int num_io_irqs;
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extern u_int num_msi_irqs;
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/*
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* Default base address for MSI messages on x86 platforms.
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*/
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#define MSI_INTEL_ADDR_BASE 0xfee00000
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#ifndef LOCORE
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typedef void inthand_t(void);
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#define IDTVEC(name) __CONCAT(X,name)
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struct intsrc;
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/*
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* Methods that a PIC provides to mask/unmask a given interrupt source,
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* "turn on" the interrupt on the CPU side by setting up an IDT entry, and
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* return the vector associated with this source.
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*/
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struct pic {
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void (*pic_register_sources)(struct pic *);
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void (*pic_enable_source)(struct intsrc *);
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void (*pic_disable_source)(struct intsrc *, int);
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void (*pic_eoi_source)(struct intsrc *);
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void (*pic_enable_intr)(struct intsrc *);
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void (*pic_disable_intr)(struct intsrc *);
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int (*pic_vector)(struct intsrc *);
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int (*pic_source_pending)(struct intsrc *);
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void (*pic_suspend)(struct pic *);
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void (*pic_resume)(struct pic *, bool suspend_cancelled);
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int (*pic_config_intr)(struct intsrc *, enum intr_trigger,
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enum intr_polarity);
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int (*pic_assign_cpu)(struct intsrc *, u_int apic_id);
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void (*pic_reprogram_pin)(struct intsrc *);
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TAILQ_ENTRY(pic) pics;
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};
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/* Flags for pic_disable_source() */
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enum {
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PIC_EOI,
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PIC_NO_EOI,
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};
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/*
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* An interrupt source. The upper-layer code uses the PIC methods to
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* control a given source. The lower-layer PIC drivers can store additional
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* private data in a given interrupt source such as an interrupt pin number
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* or an I/O APIC pointer.
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*/
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struct intsrc {
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struct pic *is_pic;
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struct intr_event *is_event;
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u_long *is_count;
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u_long *is_straycount;
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u_int is_index;
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u_int is_handlers;
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u_int is_domain;
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u_int is_cpu;
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};
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struct trapframe;
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#ifdef SMP
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extern cpuset_t intr_cpus;
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#endif
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extern struct mtx icu_lock;
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extern int elcr_found;
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#ifdef SMP
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extern int msix_disable_migration;
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#endif
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#ifndef DEV_ATPIC
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void atpic_reset(void);
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#endif
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/* XXX: The elcr_* prototypes probably belong somewhere else. */
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int elcr_probe(void);
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enum intr_trigger elcr_read_trigger(u_int irq);
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void elcr_resume(void);
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void elcr_write_trigger(u_int irq, enum intr_trigger trigger);
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#ifdef SMP
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void intr_add_cpu(u_int cpu);
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#endif
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int intr_add_handler(const char *name, int vector, driver_filter_t filter,
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driver_intr_t handler, void *arg, enum intr_type flags, void **cookiep,
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int domain);
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#ifdef SMP
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int intr_bind(u_int vector, u_char cpu);
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#endif
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int intr_config_intr(int vector, enum intr_trigger trig,
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enum intr_polarity pol);
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int intr_describe(u_int vector, void *ih, const char *descr);
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void intr_execute_handlers(struct intsrc *isrc, struct trapframe *frame);
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u_int intr_next_cpu(int domain);
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struct intsrc *intr_lookup_source(int vector);
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int intr_register_pic(struct pic *pic);
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int intr_register_source(struct intsrc *isrc);
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int intr_remove_handler(void *cookie);
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void intr_resume(bool suspend_cancelled);
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void intr_suspend(void);
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void intr_reprogram(void);
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void intrcnt_add(const char *name, u_long **countp);
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void nexus_add_irq(u_long irq);
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int msi_alloc(device_t dev, int count, int maxcount, int *irqs);
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void msi_init(void);
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int msi_map(int irq, uint64_t *addr, uint32_t *data);
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int msi_release(int *irqs, int count);
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int msix_alloc(device_t dev, int *irq);
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int msix_release(int irq);
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#ifdef XENHVM
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void xen_intr_alloc_irqs(void);
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#endif
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#endif /* !LOCORE */
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#endif /* _KERNEL */
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#endif /* !__X86_INTR_MACHDEP_H__ */
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73
freebsd/sys/x86/include/machine/legacyvar.h
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73
freebsd/sys/x86/include/machine/legacyvar.h
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@ -0,0 +1,73 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2000 Peter Wemm <peter@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _X86_LEGACYVAR_H_
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#define _X86_LEGACYVAR_H_
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enum legacy_device_ivars {
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LEGACY_IVAR_PCIDOMAIN,
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LEGACY_IVAR_PCIBUS,
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LEGACY_IVAR_PCISLOT,
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LEGACY_IVAR_PCIFUNC
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};
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#define LEGACY_ACCESSOR(var, ivar, type) \
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__BUS_ACCESSOR(legacy, var, LEGACY, ivar, type)
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LEGACY_ACCESSOR(pcidomain, PCIDOMAIN, uint32_t)
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LEGACY_ACCESSOR(pcibus, PCIBUS, uint32_t)
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LEGACY_ACCESSOR(pcislot, PCISLOT, int)
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LEGACY_ACCESSOR(pcifunc, PCIFUNC, int)
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#undef LEGACY_ACCESSOR
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int legacy_pcib_maxslots(device_t dev);
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uint32_t legacy_pcib_read_config(device_t dev, u_int bus, u_int slot,
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u_int func, u_int reg, int bytes);
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int legacy_pcib_read_ivar(device_t dev, device_t child, int which,
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uintptr_t *result);
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void legacy_pcib_write_config(device_t dev, u_int bus, u_int slot,
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u_int func, u_int reg, uint32_t data, int bytes);
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int legacy_pcib_write_ivar(device_t dev, device_t child, int which,
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uintptr_t value);
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struct resource *legacy_pcib_alloc_resource(device_t dev, device_t child,
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int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
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u_int flags);
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int legacy_pcib_adjust_resource(device_t dev, device_t child, int type,
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struct resource *r, rman_res_t start, rman_res_t end);
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int legacy_pcib_release_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r);
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int legacy_pcib_alloc_msi(device_t pcib, device_t dev, int count,
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int maxcount, int *irqs);
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int legacy_pcib_alloc_msix(device_t pcib, device_t dev, int *irq);
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int legacy_pcib_map_msi(device_t pcib, device_t dev, int irq,
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uint64_t *addr, uint32_t *data);
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#endif /* !_X86_LEGACYVAR_H_ */
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57
freebsd/sys/x86/include/machine/metadata.h
Normal file
57
freebsd/sys/x86/include/machine/metadata.h
Normal file
@ -0,0 +1,57 @@
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/*-
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* Copyright (c) 2003 Peter Wemm <peter@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
|
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* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_METADATA_H_
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#define _MACHINE_METADATA_H_
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#define MODINFOMD_SMAP 0x1001
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#define MODINFOMD_SMAP_XATTR 0x1002
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#define MODINFOMD_DTBP 0x1003
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#define MODINFOMD_EFI_MAP 0x1004
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#define MODINFOMD_EFI_FB 0x1005
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#define MODINFOMD_MODULEP 0x1006
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struct efi_map_header {
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uint64_t memory_size;
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uint64_t descriptor_size;
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uint32_t descriptor_version;
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};
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struct efi_fb {
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uint64_t fb_addr;
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uint64_t fb_size;
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uint32_t fb_height;
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uint32_t fb_width;
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uint32_t fb_stride;
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uint32_t fb_mask_red;
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uint32_t fb_mask_green;
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uint32_t fb_mask_blue;
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uint32_t fb_mask_reserved;
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};
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#endif /* !_MACHINE_METADATA_H_ */
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393
freebsd/sys/x86/x86/legacy.c
Normal file
393
freebsd/sys/x86/x86/legacy.c
Normal file
@ -0,0 +1,393 @@
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#include <machine/rtems-bsd-kernel-space.h>
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/*-
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* Copyright 1998 Massachusetts Institute of Technology
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*
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* Permission to use, copy, modify, and distribute this software and
|
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* its documentation for any purpose and without fee is hereby
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* granted, provided that both the above copyright notice and this
|
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* permission notice appear in all copies, that both the above
|
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* copyright notice and this permission notice appear in all
|
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* supporting documentation, and that the name of M.I.T. not be used
|
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* in advertising or publicity pertaining to distribution of the
|
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* software without specific, written prior permission. M.I.T. makes
|
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* no representations about the suitability of this software for any
|
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* purpose. It is provided "as is" without express or implied
|
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* warranty.
|
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*
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* THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
|
||||
* ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
|
||||
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
|
||||
* SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
|
||||
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* This code implements a system driver for legacy systems that do not
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* support ACPI or when ACPI support is not present in the kernel.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <machine/bus.h>
|
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#include <sys/pcpu.h>
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#include <sys/rman.h>
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#include <sys/smp.h>
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#include <dev/pci/pcireg.h>
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#include <machine/clock.h>
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#include <machine/pci_cfgreg.h>
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#include <machine/resource.h>
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#include <x86/legacyvar.h>
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static MALLOC_DEFINE(M_LEGACYDEV, "legacydrv", "legacy system device");
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struct legacy_device {
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int lg_pcibus;
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int lg_pcislot;
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int lg_pcifunc;
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};
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#define DEVTOAT(dev) ((struct legacy_device *)device_get_ivars(dev))
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static int legacy_probe(device_t);
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static int legacy_attach(device_t);
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static int legacy_print_child(device_t, device_t);
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static device_t legacy_add_child(device_t bus, u_int order, const char *name,
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int unit);
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static int legacy_read_ivar(device_t, device_t, int, uintptr_t *);
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static int legacy_write_ivar(device_t, device_t, int, uintptr_t);
|
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static device_method_t legacy_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, legacy_probe),
|
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DEVMETHOD(device_attach, legacy_attach),
|
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
|
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DEVMETHOD(device_resume, bus_generic_resume),
|
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|
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/* Bus interface */
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DEVMETHOD(bus_print_child, legacy_print_child),
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DEVMETHOD(bus_add_child, legacy_add_child),
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DEVMETHOD(bus_read_ivar, legacy_read_ivar),
|
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DEVMETHOD(bus_write_ivar, legacy_write_ivar),
|
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DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
|
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DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
|
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DEVMETHOD(bus_release_resource, bus_generic_release_resource),
|
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
||||
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
|
||||
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
||||
static driver_t legacy_driver = {
|
||||
"legacy",
|
||||
legacy_methods,
|
||||
1, /* no softc */
|
||||
};
|
||||
static devclass_t legacy_devclass;
|
||||
|
||||
DRIVER_MODULE(legacy, nexus, legacy_driver, legacy_devclass, 0, 0);
|
||||
|
||||
static int
|
||||
legacy_probe(device_t dev)
|
||||
{
|
||||
|
||||
device_set_desc(dev, "legacy system");
|
||||
device_quiet(dev);
|
||||
return (0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Grope around in the PCI config space to see if this is a chipset
|
||||
* that is capable of doing memory-mapped config cycles. This also
|
||||
* implies that it can do PCIe extended config cycles.
|
||||
*/
|
||||
static void
|
||||
legacy_pci_cfgregopen(device_t dev)
|
||||
{
|
||||
uint64_t pciebar;
|
||||
u_int16_t did, vid;
|
||||
|
||||
if (cfgmech == CFGMECH_NONE || cfgmech == CFGMECH_PCIE)
|
||||
return;
|
||||
|
||||
/* Check for supported chipsets */
|
||||
vid = pci_cfgregread(0, 0, 0, PCIR_VENDOR, 2);
|
||||
did = pci_cfgregread(0, 0, 0, PCIR_DEVICE, 2);
|
||||
switch (vid) {
|
||||
case 0x8086:
|
||||
switch (did) {
|
||||
case 0x3590:
|
||||
case 0x3592:
|
||||
/* Intel 7520 or 7320 */
|
||||
pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16;
|
||||
pcie_cfgregopen(pciebar, 0, 255);
|
||||
break;
|
||||
case 0x2580:
|
||||
case 0x2584:
|
||||
case 0x2590:
|
||||
/* Intel 915, 925, or 915GM */
|
||||
pciebar = pci_cfgregread(0, 0, 0, 0x48, 4);
|
||||
pcie_cfgregopen(pciebar, 0, 255);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (bootverbose && cfgmech == CFGMECH_PCIE)
|
||||
device_printf(dev, "Enabled ECAM PCIe accesses\n");
|
||||
}
|
||||
|
||||
static int
|
||||
legacy_attach(device_t dev)
|
||||
{
|
||||
device_t child;
|
||||
|
||||
legacy_pci_cfgregopen(dev);
|
||||
|
||||
/*
|
||||
* Let our child drivers identify any child devices that they
|
||||
* can find. Once that is done attach any devices that we
|
||||
* found.
|
||||
*/
|
||||
bus_generic_probe(dev);
|
||||
bus_generic_attach(dev);
|
||||
|
||||
/*
|
||||
* If we didn't see ISA on a PCI bridge, add a top-level bus.
|
||||
*/
|
||||
if (!devclass_get_device(devclass_find("isa"), 0)) {
|
||||
child = BUS_ADD_CHILD(dev, 0, "isa", 0);
|
||||
if (child == NULL)
|
||||
panic("legacy_attach isa");
|
||||
device_probe_and_attach(child);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
legacy_print_child(device_t bus, device_t child)
|
||||
{
|
||||
struct legacy_device *atdev = DEVTOAT(child);
|
||||
int retval = 0;
|
||||
|
||||
retval += bus_print_child_header(bus, child);
|
||||
if (atdev->lg_pcibus != -1)
|
||||
retval += printf(" pcibus %d", atdev->lg_pcibus);
|
||||
retval += printf("\n");
|
||||
|
||||
return (retval);
|
||||
}
|
||||
|
||||
static device_t
|
||||
legacy_add_child(device_t bus, u_int order, const char *name, int unit)
|
||||
{
|
||||
device_t child;
|
||||
struct legacy_device *atdev;
|
||||
|
||||
atdev = malloc(sizeof(struct legacy_device), M_LEGACYDEV,
|
||||
M_NOWAIT | M_ZERO);
|
||||
if (atdev == NULL)
|
||||
return(NULL);
|
||||
atdev->lg_pcibus = -1;
|
||||
atdev->lg_pcislot = -1;
|
||||
atdev->lg_pcifunc = -1;
|
||||
|
||||
child = device_add_child_ordered(bus, order, name, unit);
|
||||
if (child == NULL)
|
||||
free(atdev, M_LEGACYDEV);
|
||||
else
|
||||
/* should we free this in legacy_child_detached? */
|
||||
device_set_ivars(child, atdev);
|
||||
|
||||
return (child);
|
||||
}
|
||||
|
||||
static int
|
||||
legacy_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
|
||||
{
|
||||
struct legacy_device *atdev = DEVTOAT(child);
|
||||
|
||||
switch (which) {
|
||||
case LEGACY_IVAR_PCIDOMAIN:
|
||||
*result = 0;
|
||||
break;
|
||||
case LEGACY_IVAR_PCIBUS:
|
||||
*result = atdev->lg_pcibus;
|
||||
break;
|
||||
case LEGACY_IVAR_PCISLOT:
|
||||
*result = atdev->lg_pcislot;
|
||||
break;
|
||||
case LEGACY_IVAR_PCIFUNC:
|
||||
*result = atdev->lg_pcifunc;
|
||||
break;
|
||||
default:
|
||||
return ENOENT;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static int
|
||||
legacy_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
|
||||
{
|
||||
struct legacy_device *atdev = DEVTOAT(child);
|
||||
|
||||
switch (which) {
|
||||
case LEGACY_IVAR_PCIDOMAIN:
|
||||
return EINVAL;
|
||||
case LEGACY_IVAR_PCIBUS:
|
||||
atdev->lg_pcibus = value;
|
||||
break;
|
||||
case LEGACY_IVAR_PCISLOT:
|
||||
atdev->lg_pcislot = value;
|
||||
break;
|
||||
case LEGACY_IVAR_PCIFUNC:
|
||||
atdev->lg_pcifunc = value;
|
||||
break;
|
||||
default:
|
||||
return ENOENT;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Legacy CPU attachment when ACPI is not available. Drivers like
|
||||
* cpufreq(4) hang off this.
|
||||
*/
|
||||
static void cpu_identify(driver_t *driver, device_t parent);
|
||||
static int cpu_read_ivar(device_t dev, device_t child, int index,
|
||||
uintptr_t *result);
|
||||
static device_t cpu_add_child(device_t bus, u_int order, const char *name,
|
||||
int unit);
|
||||
static struct resource_list *cpu_get_rlist(device_t dev, device_t child);
|
||||
|
||||
struct cpu_device {
|
||||
struct resource_list cd_rl;
|
||||
struct pcpu *cd_pcpu;
|
||||
};
|
||||
|
||||
static device_method_t cpu_methods[] = {
|
||||
/* Device interface */
|
||||
DEVMETHOD(device_identify, cpu_identify),
|
||||
DEVMETHOD(device_probe, bus_generic_probe),
|
||||
DEVMETHOD(device_attach, bus_generic_attach),
|
||||
DEVMETHOD(device_detach, bus_generic_detach),
|
||||
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
||||
DEVMETHOD(device_suspend, bus_generic_suspend),
|
||||
DEVMETHOD(device_resume, bus_generic_resume),
|
||||
|
||||
/* Bus interface */
|
||||
DEVMETHOD(bus_add_child, cpu_add_child),
|
||||
DEVMETHOD(bus_read_ivar, cpu_read_ivar),
|
||||
DEVMETHOD(bus_get_resource_list, cpu_get_rlist),
|
||||
DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
|
||||
DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
|
||||
DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
|
||||
DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
|
||||
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
||||
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
||||
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
|
||||
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
|
||||
|
||||
DEVMETHOD_END
|
||||
};
|
||||
|
||||
static driver_t cpu_driver = {
|
||||
"cpu",
|
||||
cpu_methods,
|
||||
1, /* no softc */
|
||||
};
|
||||
static devclass_t cpu_devclass;
|
||||
DRIVER_MODULE(cpu, legacy, cpu_driver, cpu_devclass, 0, 0);
|
||||
|
||||
static void
|
||||
cpu_identify(driver_t *driver, device_t parent)
|
||||
{
|
||||
device_t child;
|
||||
int i;
|
||||
|
||||
/*
|
||||
* Attach a cpuX device for each CPU. We use an order of 150
|
||||
* so that these devices are attached after the Host-PCI
|
||||
* bridges (which are added at order 100).
|
||||
*/
|
||||
CPU_FOREACH(i) {
|
||||
child = BUS_ADD_CHILD(parent, 150, "cpu", i);
|
||||
if (child == NULL)
|
||||
panic("legacy_attach cpu");
|
||||
}
|
||||
}
|
||||
|
||||
static device_t
|
||||
cpu_add_child(device_t bus, u_int order, const char *name, int unit)
|
||||
{
|
||||
struct cpu_device *cd;
|
||||
device_t child;
|
||||
struct pcpu *pc;
|
||||
|
||||
if ((cd = malloc(sizeof(*cd), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL)
|
||||
return (NULL);
|
||||
|
||||
resource_list_init(&cd->cd_rl);
|
||||
pc = pcpu_find(device_get_unit(bus));
|
||||
cd->cd_pcpu = pc;
|
||||
|
||||
child = device_add_child_ordered(bus, order, name, unit);
|
||||
if (child != NULL) {
|
||||
pc->pc_device = child;
|
||||
device_set_ivars(child, cd);
|
||||
} else
|
||||
free(cd, M_DEVBUF);
|
||||
return (child);
|
||||
}
|
||||
|
||||
static struct resource_list *
|
||||
cpu_get_rlist(device_t dev, device_t child)
|
||||
{
|
||||
struct cpu_device *cpdev;
|
||||
|
||||
cpdev = device_get_ivars(child);
|
||||
return (&cpdev->cd_rl);
|
||||
}
|
||||
|
||||
static int
|
||||
cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
|
||||
{
|
||||
struct cpu_device *cpdev;
|
||||
|
||||
switch (index) {
|
||||
case CPU_IVAR_PCPU:
|
||||
cpdev = device_get_ivars(child);
|
||||
*result = (uintptr_t)cpdev->cd_pcpu;
|
||||
break;
|
||||
case CPU_IVAR_NOMINAL_MHZ:
|
||||
if (tsc_is_invariant) {
|
||||
*result = (uintptr_t)(atomic_load_acq_64(&tsc_freq) /
|
||||
1000000);
|
||||
break;
|
||||
}
|
||||
/* FALLTHROUGH */
|
||||
default:
|
||||
return (ENOENT);
|
||||
}
|
||||
return (0);
|
||||
}
|
Loading…
x
Reference in New Issue
Block a user