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Update to FreeBSD head 2018-02-01

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Git mirror commit d079ae0442af8fa3cfd6d7ede190d04e64a2c0d4.

Update #3472.
This commit is contained in:
Sebastian Huber
2018-08-20 15:53:03 +02:00
parent bb80d9df8b
commit 18fa92c2dc
356 changed files with 6598 additions and 3376 deletions
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17
freebsd/sys/powerpc/include/machine/spr.h
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@@ -199,6 +199,9 @@
#define FSL_E300C3 0x8085
#define FSL_E300C4 0x8086
#define SPR_LPCR 0x13e /* Logical Partitioning Control */
#define LPCR_LPES 0x008 /* Bit 60 */
#define SPR_EPCR 0x133
#define EPCR_EXTGS 0x80000000
#define EPCR_DTLBGS 0x40000000
@@ -673,19 +676,7 @@
#define PMC970N_CYCLES 0xf /* Processor cycles */
#define PMC970N_ICOMP 0x9 /* Instructions completed */
#if defined(AIM)
#define SPR_ESR 0x3d4 /* 4.. Exception Syndrome Register */
#define ESR_MCI 0x80000000 /* Machine check - instruction */
#define ESR_PIL 0x08000000 /* Program interrupt - illegal */
#define ESR_PPR 0x04000000 /* Program interrupt - privileged */
#define ESR_PTR 0x02000000 /* Program interrupt - trap */
#define ESR_ST 0x01000000 /* Store operation */
#define ESR_DST 0x00800000 /* Data storage interrupt - store fault */
#define ESR_DIZ 0x00800000 /* Data/instruction storage interrupt - zone fault */
#define ESR_U0F 0x00008000 /* Data storage interrupt - U0 fault */
#elif defined(BOOKE)
#if defined(BOOKE)
#define SPR_MCARU 0x239 /* ..8 Machine Check Address register upper bits */
#define SPR_MCSR 0x23c /* ..8 Machine Check Syndrome register */