rtems/rtems-libbsd
1
0
Fork 0
mirror of https://git.rtems.org/rtems-libbsd/ synced 2025-10-14 07:15:58 +08:00
Code Issues Packages Projects Releases Wiki Activity

Update to FreeBSD head 2018-04-01

Browse Source 
Git mirror commit 8dfb1ccc26d1cea7e2529303003ff61f9f1784c4.

Update #3472.
This commit is contained in:
Sebastian Huber
2018-08-21 09:39:55 +02:00
parent 18fa92c2dc
commit 2df56dbd60
327 changed files with 6676 additions and 3502 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
freebsd/sys/powerpc/include/machine/psl.h
View File

@@ -90,28 +90,13 @@
#define PSL_FE_PREC (PSL_FE0 | PSL_FE1) /* precise */
#define PSL_FE_DFLT PSL_FE_DIS /* default == none */
#if defined(BOOKE_E500)
/* Initial kernel MSR, use IS=1 ad DS=1. */
#define PSL_KERNSET_INIT (PSL_IS | PSL_DS)
#ifndef LOCORE
extern register_t psl_kernset; /* Default MSR values for kernel */
extern register_t psl_userset; /* Default MSR values for userland */
#ifdef __powerpc64__
#define PSL_KERNSET (PSL_CM | PSL_CE | PSL_ME | PSL_EE)
#else
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE)
extern register_t psl_userset32; /* Default user MSR values for 32-bit */
#endif
#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
#elif defined(BOOKE_PPC4XX)
#define PSL_KERNSET (PSL_CE | PSL_ME | PSL_EE | PSL_FP)
#define PSL_SRR1_MASK 0x00000000UL /* No mask on Book-E */
#elif defined(AIM)
#ifdef __powerpc64__
#define PSL_KERNSET (PSL_SF | PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
#else
#define PSL_KERNSET (PSL_EE | PSL_ME | PSL_IR | PSL_DR | PSL_RI)
extern register_t psl_userstatic; /* Bits of SRR1 userland may not set */
#endif
#define PSL_SRR1_MASK 0x783f0000UL /* Bits 1-4, 10-15 (ppc32), 33-36, 42-47 (ppc64) */
#endif
#define PSL_USERSET (PSL_KERNSET | PSL_PR)
#define PSL_USERSTATIC (~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1) & ~PSL_SRR1_MASK)
#endif /* _MACHINE_PSL_H_ */

10
freebsd/sys/powerpc/include/machine/spr.h
View File

@@ -170,6 +170,7 @@
#define IBMPOWER3PLUS 0x0041
#define IBM970MP 0x0044
#define IBM970GX 0x0045
#define IBMPOWERPCA2 0x0049
#define IBMPOWER7PLUS 0x004a
#define IBMPOWER8E 0x004b
#define IBMPOWER8 0x004d
@@ -201,7 +202,14 @@
#define SPR_LPCR 0x13e /* Logical Partitioning Control */
#define LPCR_LPES 0x008 /* Bit 60 */
#define LPCR_PECE_DRBL (1ULL << 16) /* Directed Privileged Doorbell */
#define LPCR_PECE_HDRBL (1ULL << 15) /* Directed Hypervisor Doorbell */
#define LPCR_PECE_EXT (1ULL << 14) /* External exceptions */
#define LPCR_PECE_DECR (1ULL << 13) /* Decrementer exceptions */
#define LPCR_PECE_ME (1ULL << 12) /* Machine Check and Hypervisor */
/* Maintenance exceptions */
#define LPCR_PECE_WAKESET (LPCR_PECE_EXT | LPCR_PECE_DECR | LPCR_PECE_ME)
#define SPR_EPCR 0x133
#define EPCR_EXTGS 0x80000000
#define EPCR_DTLBGS 0x40000000