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bsp/imxrt: Enable cache handling

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The BSP needs the CPU_DATA_CACHE_ALIGNMENT set to enable correct cache
handling in libbsd. Otherwise for example USB doesn't work reliable.
This commit is contained in:
Christian Mauderer
2023-08-11 07:37:35 +02:00
parent af0fcc35f7
commit 3393edcb4b
1 changed files with 1 additions and 1 deletions
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2
rtemsbsd/include/machine/rtems-bsd-cache.h
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@@ -45,7 +45,7 @@
#if defined(LIBBSP_ARM_LPC24XX_BSP_H) || (defined(LIBBSP_ARM_LPC32XX_BSP_H) && defined(LPC32XX_DISABLE_MMU))
/* No cache */
#elif defined(LIBBSP_ARM_ALTERA_CYCLONE_V_BSP_H) || \
defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H) || (defined(LIBBSP_ARM_LPC32XX_BSP_H) && !defined(LPC32XX_DISABLE_MMU)) || defined(LIBBSP_ARM_IMX_BSP_H)
defined(LIBBSP_ARM_XILINX_ZYNQ_BSP_H) || (defined(LIBBSP_ARM_LPC32XX_BSP_H) && !defined(LPC32XX_DISABLE_MMU)) || defined(LIBBSP_ARM_IMX_BSP_H) || defined(LIBBSP_ARM_IMXRT_BSP_H)
/* With cache, no coherency support in hardware */
#define CPU_DATA_CACHE_ALIGNMENT 32
#elif defined(__GEN83xx_BSP_h)