mirror of
https://git.rtems.org/rtems-libbsd/
synced 2025-10-14 00:38:39 +08:00
saf1761_otg: Port to RTEMS.
This commit is contained in:
Christian Mauderer
committed by
Sebastian Huber
Sebastian Huber
parent
cf8e1d47e2
commit
589220752b
@@ -44,14 +44,14 @@
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#else
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#include <sys/stdint.h>
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#include <sys/stddef.h>
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#include <rtems/bsd/sys/param.h>
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#include <sys/param.h>
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#include <sys/queue.h>
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <rtems/bsd/sys/lock.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/condvar.h>
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#include <sys/sysctl.h>
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@@ -82,6 +82,13 @@
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#include <dev/usb/controller/saf1761_otg.h>
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#include <dev/usb/controller/saf1761_otg_reg.h>
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#ifdef __rtems__
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#include <rtems.h>
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#include <bsp.h>
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#ifdef LIBBSP_ARM_ATSAM_BSP_H
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#include <bsp/pin-config.h>
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#endif /* LIBBSP_ARM_ATSAM_BSP_H */
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#endif /* __rtems__ */
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#define SAF1761_OTG_BUS2SC(bus) \
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((struct saf1761_otg_softc *)(((uint8_t *)(bus)) - \
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@@ -518,7 +525,29 @@ saf1761_host_bulk_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
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DPRINTFN(5, "STATUS=0x%08x\n", status);
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if (status & SOTG_PTD_DW3_ACTIVE) {
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#ifndef __rtems__
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goto busy;
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#else /* __rtems__ */
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temp = saf1761_peek_host_status_le_4(sc,
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pdt_addr + SOTG_PTD_DW0);
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if (temp & SOTG_PTD_DW0_VALID) {
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goto busy;
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} else {
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status = saf1761_peek_host_status_le_4(sc,
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pdt_addr + SOTG_PTD_DW3);
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/* check if still active */
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if (status & SOTG_PTD_DW3_ACTIVE) {
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saf1761_host_channel_free(sc, td);
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goto retry;
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} else if (status & SOTG_PTD_DW3_HALTED) {
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if (!(status & SOTG_PTD_DW3_ERRORS))
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td->error_stall = 1;
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td->error_any = 1;
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goto complete;
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}
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}
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#endif /* __rtems__ */
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} else if (status & SOTG_PTD_DW3_HALTED) {
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if (!(status & SOTG_PTD_DW3_ERRORS))
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td->error_stall = 1;
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@@ -562,6 +591,9 @@ saf1761_host_bulk_data_rx(struct saf1761_otg_softc *sc, struct saf1761_otg_td *t
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}
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saf1761_host_channel_free(sc, td);
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}
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#ifdef __rtems__
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retry:
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#endif /* __rtems__ */
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if (saf1761_host_channel_alloc(sc, td))
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goto busy;
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@@ -1591,6 +1623,10 @@ saf1761_otg_filter_interrupt(void *arg)
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(void) SAF1761_READ_LE_4(sc, SOTG_INT_PTD_DONE_PTD);
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(void) SAF1761_READ_LE_4(sc, SOTG_ISO_PTD_DONE_PTD);
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#ifdef __rtems__
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DPRINTFN(9, "HCINTERRUPT=0x%08x DCINTERRUPT=0x%08x\n", hcstat, status);
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#endif /* __rtems__ */
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if (status & SOTG_DCINTERRUPT_IEPSOF) {
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if ((sc->sc_host_async_busy_map[1] | sc->sc_host_async_busy_map[0] |
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sc->sc_host_intr_busy_map[1] | sc->sc_host_intr_busy_map[0] |
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@@ -1623,6 +1659,15 @@ saf1761_otg_filter_interrupt(void *arg)
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USB_BUS_SPIN_UNLOCK(&sc->sc_bus);
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#ifdef __rtems__
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#ifdef LIBBSP_ARM_ATSAM_BSP_H
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const Pio *saf_irq_pio = PIOC;
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/* The PIOC is used only by the SAF1761. So we can just reset the status
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* without any further handling. */
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(void) saf_irq_pio->PIO_ISR;
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#endif /* LIBBSP_ARM_ATSAM_BSP_H */
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#endif /* __rtems__ */
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return (retval);
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}
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@@ -2448,10 +2493,15 @@ saf1761_otg_init(struct saf1761_otg_softc *sc)
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*/
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SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
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SOTG_CTRL_CLR(0xFFFF));
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#ifdef __rtems__
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SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
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SOTG_CTRL_SET(SOTG_CTRL_SEL_CP_EXT | SOTG_CTRL_VBUS_DRV));
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#else /* __rtems__ */
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SAF1761_WRITE_LE_4(sc, SOTG_CTRL_SET_CLR,
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SOTG_CTRL_SET(SOTG_CTRL_SW_SEL_HC_DC |
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SOTG_CTRL_BDIS_ACON_EN | SOTG_CTRL_SEL_CP_EXT |
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SOTG_CTRL_VBUS_DRV));
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#endif /* __rtems__ */
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/* disable device address */
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SAF1761_WRITE_LE_4(sc, SOTG_ADDRESS, 0);
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@@ -36,14 +36,14 @@
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#else
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#include <sys/stdint.h>
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#include <sys/stddef.h>
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#include <rtems/bsd/sys/param.h>
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#include <sys/param.h>
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#include <sys/queue.h>
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#include <sys/types.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/module.h>
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#include <rtems/bsd/sys/lock.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/condvar.h>
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#include <sys/sysctl.h>
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@@ -77,6 +77,13 @@
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#include <dev/usb/controller/saf1761_otg.h>
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#include <dev/usb/controller/saf1761_otg_reg.h>
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#ifdef __rtems__
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#include <rtems.h>
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#include <bsp.h>
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#ifdef LIBBSP_ARM_ATSAM_BSP_H
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#include <bsp/pin-config.h>
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#endif /* LIBBSP_ARM_ATSAM_BSP_H */
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#endif /* __rtems__ */
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static device_probe_t saf1761_otg_fdt_probe;
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static device_attach_t saf1761_otg_fdt_attach;
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@@ -102,17 +109,26 @@ static driver_t saf1761_otg_driver = {
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static devclass_t saf1761_otg_devclass;
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#ifndef __rtems__
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DRIVER_MODULE(saf1761otg, simplebus, saf1761_otg_driver, saf1761_otg_devclass, 0, 0);
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#else /* __rtems__ */
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DRIVER_MODULE(saf1761otg, nexus, saf1761_otg_driver, saf1761_otg_devclass, 0, 0);
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#endif /* __rtems__ */
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MODULE_DEPEND(saf1761otg, usb, 1, 1, 1);
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static int
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saf1761_otg_fdt_probe(device_t dev)
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{
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#ifndef __rtems__
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "nxp,usb-isp1761"))
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return (ENXIO);
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#else /* __rtems__ */
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if (device_get_unit(dev) != 0)
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return (ENXIO);
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#endif /* __rtems__ */
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device_set_desc(dev, "ISP1761/SAF1761 DCI USB 2.0 Device Controller");
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@@ -127,6 +143,7 @@ saf1761_otg_fdt_attach(device_t dev)
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int err;
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int rid;
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#ifndef __rtems__
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/* get configuration from FDT */
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/* get bus-width, if any */
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@@ -171,6 +188,10 @@ saf1761_otg_fdt_attach(device_t dev)
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sc->sc_interrupt_cfg |= SOTG_INTERRUPT_CFG_INTLVL;
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sc->sc_hw_mode |= SOTG_HW_MODE_CTRL_INTR_LEVEL;
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}
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#else /* __rtems__ */
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/* set 16-bit data bus */
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sc->sc_hw_mode = 0;
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#endif /* __rtems__ */
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/* initialise some bus fields */
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sc->sc_bus.parent = dev;
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@@ -213,6 +234,15 @@ saf1761_otg_fdt_attach(device_t dev)
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device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
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#ifdef __rtems__
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#ifdef LIBBSP_ARM_ATSAM_BSP_H
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const Pin saf_irq = {PIO_PC16, PIOC, ID_PIOC, PIO_INPUT, PIO_PULLUP | PIO_IT_LOW_LEVEL};
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/* Activate pin interrupt. Add a default handler that just clears the
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* status. */
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PIO_Configure(&saf_irq, 1);
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PIO_EnableIt(&saf_irq);
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#endif /* LIBBSP_ARM_ATSAM_BSP_H */
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#endif /* __rtems__ */
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err = bus_setup_intr(dev, sc->sc_irq_res, INTR_TYPE_TTY | INTR_MPSAFE,
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&saf1761_otg_filter_interrupt, &saf1761_otg_interrupt, sc, &sc->sc_intr_hdl);
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if (err) {
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