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https://git.rtems.org/rtems-libbsd/
synced 2025-06-03 12:59:32 +08:00
if_dwc: Avoid tx defrag if possible
Drop packets in case of resource shortage.
This commit is contained in:
Sebastian Huber
parent
d9ff8281d7
commit
5deeb69c7e
@ -157,10 +157,10 @@ next_rxidx(struct dwc_softc *sc, uint32_t curidx)
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}
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static inline uint32_t
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next_txidx(struct dwc_softc *sc, uint32_t curidx)
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next_txidx(struct dwc_softc *sc, uint32_t curidx, int inc)
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{
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return ((curidx + 1) % TX_DESC_COUNT);
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return ((curidx + (uint32_t)inc) % TX_DESC_COUNT);
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}
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static void
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@ -172,62 +172,100 @@ dwc_get1paddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
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*(bus_addr_t *)arg = segs[0].ds_addr;
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}
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inline static uint32_t
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dwc_setup_txdesc(struct dwc_softc *sc, int idx, bus_addr_t paddr,
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uint32_t len)
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static void
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dwc_setup_txdesc(struct dwc_softc *sc, int idx, bus_dma_segment_t segs[TX_MAX_DMA_SEGS],
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int nsegs)
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{
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uint32_t flags;
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int i;
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++sc->txcount;
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sc->txcount += nsegs;
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sc->txdesc_ring[idx].addr = (uint32_t)(paddr);
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if (sc->mactype == DWC_GMAC_ALT_DESC) {
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flags = DDESC_CNTL_TXCHAIN | DDESC_CNTL_TXFIRST
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| DDESC_CNTL_TXLAST | DDESC_CNTL_TXINT;
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sc->txdesc_ring[idx].tdes0 = 0;
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sc->txdesc_ring[idx].tdes1 = flags | len;
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} else {
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flags = DDESC_TDES0_TXCHAIN | DDESC_TDES0_TXFIRST
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| DDESC_TDES0_TXLAST | DDESC_TDES0_TXINT;
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sc->txdesc_ring[idx].tdes0 = flags;
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sc->txdesc_ring[idx].tdes1 = len;
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idx = next_txidx(sc, idx, nsegs);
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sc->tx_idx_head = idx;
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/*
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* Fill in the TX descriptors back to front so that OWN bit in first
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* descriptor is set last.
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*/
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for (i = nsegs - 1; i >= 0; i--) {
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uint32_t flags;
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uint32_t len;
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idx = next_txidx(sc, idx, -1);
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sc->txdesc_ring[idx].addr = segs[i].ds_addr;
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len = segs[i].ds_len;
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if (sc->mactype == DWC_GMAC_ALT_DESC) {
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flags = DDESC_CNTL_TXCHAIN | DDESC_CNTL_TXINT;
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if (i == 0)
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flags |= DDESC_CNTL_TXFIRST;
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if (i == nsegs - 1)
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flags |= DDESC_CNTL_TXLAST;
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sc->txdesc_ring[idx].tdes0 = 0;
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sc->txdesc_ring[idx].tdes1 = flags | len;
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} else {
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flags = DDESC_TDES0_TXCHAIN | DDESC_TDES0_TXINT |
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DDESC_TDES0_OWN;
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if (i == 0)
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flags |= DDESC_TDES0_TXFIRST;
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if (i == nsegs - 1)
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flags |= DDESC_TDES0_TXLAST;
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sc->txdesc_ring[idx].tdes1 = len;
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wmb();
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sc->txdesc_ring[idx].tdes0 = flags;
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}
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wmb();
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if (i != 0)
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sc->txbuf_map[idx].mbuf = NULL;
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}
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wmb();
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sc->txdesc_ring[idx].tdes0 = DDESC_TDES0_TXCHAIN | DDESC_TDES0_TXFIRST
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| DDESC_TDES0_TXLAST | DDESC_TDES0_TXINT | DDESC_TDES0_OWN;
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wmb();
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return (next_txidx(sc, idx));
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}
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static int
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dwc_setup_txbuf(struct dwc_softc *sc, int idx, struct mbuf **mp)
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static void
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dwc_setup_txbuf(struct dwc_softc *sc, struct mbuf *m, int *start_tx)
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{
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struct bus_dma_segment seg;
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int error, nsegs;
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struct mbuf * m;
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if ((m = m_defrag(*mp, M_NOWAIT)) == NULL)
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return (ENOMEM);
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*mp = m;
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bus_dma_segment_t segs[TX_MAX_DMA_SEGS];
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int error, nsegs, idx;
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idx = sc->tx_idx_head;
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error = bus_dmamap_load_mbuf_sg(sc->txbuf_tag, sc->txbuf_map[idx].map,
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m, &seg, &nsegs, 0);
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m, &seg, &nsegs, BUS_DMA_NOWAIT);
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if (error == EFBIG) {
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/* Too many segments! Defrag and try again. */
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struct mbuf *m2 = m_defrag(m, M_NOWAIT);
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if (m2 == NULL) {
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m_freem(m);
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return;
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}
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m = m2;
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error = bus_dmamap_load_mbuf_sg(sc->txbuf_tag,
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sc->txbuf_map[idx].map, m, &seg, &nsegs, BUS_DMA_NOWAIT);
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}
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if (error != 0) {
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return (ENOMEM);
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/* Give up. */
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m_freem(m);
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return;
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}
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KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs));
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sc->txbuf_map[idx].mbuf = m;
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bus_dmamap_sync(sc->txbuf_tag, sc->txbuf_map[idx].map,
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BUS_DMASYNC_PREWRITE);
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sc->txbuf_map[idx].mbuf = m;
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dwc_setup_txdesc(sc, idx, segs, nsegs);
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dwc_setup_txdesc(sc, idx, seg.ds_addr, seg.ds_len);
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return (0);
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ETHER_BPF_MTAP(sc->ifp, m);
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*start_tx = 1;
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}
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static void
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@ -235,7 +273,7 @@ dwc_txstart_locked(struct dwc_softc *sc)
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{
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struct ifnet *ifp;
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struct mbuf *m;
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int enqueued;
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int start_tx;
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DWC_ASSERT_LOCKED(sc);
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@ -244,10 +282,10 @@ dwc_txstart_locked(struct dwc_softc *sc)
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ifp = sc->ifp;
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enqueued = 0;
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start_tx = 0;
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for (;;) {
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if (sc->txcount == (TX_DESC_COUNT-1)) {
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if (sc->txcount >= (TX_DESC_COUNT - 1 - TX_MAX_DMA_SEGS)) {
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ifp->if_drv_flags |= IFF_DRV_OACTIVE;
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break;
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}
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@ -255,16 +293,11 @@ dwc_txstart_locked(struct dwc_softc *sc)
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IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
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if (m == NULL)
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break;
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if (dwc_setup_txbuf(sc, sc->tx_idx_head, &m) != 0) {
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IFQ_DRV_PREPEND(&ifp->if_snd, m);
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break;
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}
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BPF_MTAP(ifp, m);
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sc->tx_idx_head = next_txidx(sc, sc->tx_idx_head);
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++enqueued;
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dwc_setup_txbuf(sc, m, &start_tx);
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}
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if (enqueued != 0) {
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if (start_tx != 0) {
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WRITE4(sc, TRANSMIT_POLL_DEMAND, 0x1);
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sc->tx_watchdog_count = WATCHDOG_TIMEOUT_SECS;
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}
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@ -475,7 +508,7 @@ dwc_setup_rxdesc(struct dwc_softc *sc, int idx, bus_addr_t paddr)
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static int
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dwc_setup_rxbuf(struct dwc_softc *sc, int idx, struct mbuf *m)
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{
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struct bus_dma_segment seg;
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bus_dma_segment_t seg;
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int error, nsegs;
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m_adj(m, ETHER_ALIGN);
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@ -717,7 +750,7 @@ dwc_txfinish_locked(struct dwc_softc *sc)
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m_freem(bmap->mbuf);
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bmap->mbuf = NULL;
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--sc->txcount;
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sc->tx_idx_tail = next_txidx(sc, sc->tx_idx_tail);
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sc->tx_idx_tail = next_txidx(sc, sc->tx_idx_tail, 1);
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}
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sc->ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
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@ -876,7 +909,7 @@ setup_dma(struct dwc_softc *sc)
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sc->txdesc_ring[idx].tdes0 = DDESC_TDES0_TXCHAIN;
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sc->txdesc_ring[idx].tdes1 = 0;
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}
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nidx = next_txidx(sc, idx);
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nidx = next_txidx(sc, idx, 1);
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sc->txdesc_ring[idx].addr_next = sc->txdesc_ring_paddr +
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(nidx * sizeof(struct dwc_hwdesc));
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}
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@ -887,7 +920,7 @@ setup_dma(struct dwc_softc *sc)
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BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
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BUS_SPACE_MAXADDR, /* highaddr */
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NULL, NULL, /* filter, filterarg */
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MCLBYTES, 1, /* maxsize, nsegments */
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MCLBYTES, TX_MAX_DMA_SEGS, /* maxsize, nsegments */
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MCLBYTES, /* maxsegsize */
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0, /* flags */
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NULL, NULL, /* lockfunc, lockarg */
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@ -49,6 +49,7 @@
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#define RX_DESC_SIZE (sizeof(struct dwc_hwdesc) * RX_DESC_COUNT)
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#define TX_DESC_COUNT 1024
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#define TX_DESC_SIZE (sizeof(struct dwc_hwdesc) * TX_DESC_COUNT)
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#define TX_MAX_DMA_SEGS 8 /* maximum segs in a tx mbuf dma */
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struct dwc_bufmap {
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bus_dmamap_t map;
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