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https://git.rtems.org/rtems-libbsd/
synced 2025-05-14 01:19:20 +08:00
dw_mmc: Properly init/reset DMA
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parent
138bf250c2
commit
bcaa8a28a2
@ -177,6 +177,13 @@ dw_mmc_wait_for_interrupt(struct dw_mmc_softc *sc, uint32_t intmask)
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BSD_ASSERT(rs == RTEMS_SUCCESSFUL);
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BSD_ASSERT(rs == RTEMS_SUCCESSFUL);
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}
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}
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static void
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dw_mmc_configure_dma(struct dw_mmc_softc *sc)
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{
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WR4(sc, DW_MMC_BMOD, DW_MMC_BMOD_DE | DW_MMC_BMOD_FB);
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}
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static int
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static int
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dw_mmc_init(struct dw_mmc_softc *sc)
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dw_mmc_init(struct dw_mmc_softc *sc)
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{
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{
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@ -184,13 +191,16 @@ dw_mmc_init(struct dw_mmc_softc *sc)
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uint32_t fifoth;
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uint32_t fifoth;
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int err;
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int err;
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err = dw_mmc_poll_reset_completion(sc, DW_MMC_CTRL_RESET);
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err = dw_mmc_poll_reset_completion(sc, DW_MMC_CTRL_DMA_RESET |
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DW_MMC_CTRL_FIFO_RESET | DW_MMC_CTRL_RESET);
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if (err != 0) {
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if (err != 0) {
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return err;
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return err;
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}
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}
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sc->card_clock = UINT32_MAX;
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sc->card_clock = UINT32_MAX;
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dw_mmc_configure_dma(sc);
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/* Clear interrupt status */
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/* Clear interrupt status */
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WR4(sc, DW_MMC_RINTSTS, 0xffffffff);
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WR4(sc, DW_MMC_RINTSTS, 0xffffffff);
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@ -223,7 +233,10 @@ dw_mmc_init(struct dw_mmc_softc *sc)
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static void
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static void
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dw_mmc_fini(struct dw_mmc_softc *sc)
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dw_mmc_fini(struct dw_mmc_softc *sc)
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{
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{
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WR4(sc, DW_MMC_CTRL, DW_MMC_CTRL_FIFO_RESET | DW_MMC_CTRL_RESET);
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WR4(sc, DW_MMC_CTRL, DW_MMC_CTRL_DMA_RESET | DW_MMC_CTRL_FIFO_RESET |
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DW_MMC_CTRL_RESET);
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wmb();
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WR4(sc, DW_MMC_BMOD, DW_MMC_BMOD_SWR);
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}
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}
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static struct ofw_compat_data compat_data[] = {
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static struct ofw_compat_data compat_data[] = {
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@ -533,12 +546,19 @@ dw_mmc_fifo_and_dma_reset(struct dw_mmc_softc *sc)
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{
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{
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uint32_t ctrl_resets = DW_MMC_CTRL_FIFO_RESET | DW_MMC_CTRL_DMA_RESET;
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uint32_t ctrl_resets = DW_MMC_CTRL_FIFO_RESET | DW_MMC_CTRL_DMA_RESET;
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uint32_t ctrl = RD4(sc, DW_MMC_CTRL);
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uint32_t ctrl = RD4(sc, DW_MMC_CTRL);
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int err;
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ctrl &= ~DW_MMC_CTRL_DMA_ENABLE;
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ctrl |= ctrl_resets;
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ctrl |= ctrl_resets;
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WR4(sc, DW_MMC_CTRL, ctrl);
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WR4(sc, DW_MMC_CTRL, ctrl);
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return dw_mmc_poll_reset_completion(sc, ctrl_resets);
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err = dw_mmc_poll_reset_completion(sc, ctrl_resets);
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if (err != 0)
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return (err);
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WR4(sc, DW_MMC_BMOD, DW_MMC_BMOD_SWR);
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return (0);
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}
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}
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static int
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static int
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@ -832,12 +852,7 @@ dw_mmc_dma_setup(struct dw_mmc_softc *sc, struct mmc_data *data)
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}
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}
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des[i].des0 = DW_MMC_DES0_OWN | DW_MMC_DES0_ER | fs | DW_MMC_DES0_LD;
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des[i].des0 = DW_MMC_DES0_OWN | DW_MMC_DES0_ER | fs | DW_MMC_DES0_LD;
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wmb();
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#ifdef __arm__
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_ARM_Data_synchronization_barrier();
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#else
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/* TODO */
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#endif
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}
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}
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@ -897,11 +912,11 @@ dw_mmc_cmd_do(struct dw_mmc_softc *sc, struct mmc_request *req,
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if (use_dma) {
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if (use_dma) {
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ctrl |= DW_MMC_CTRL_DMA_ENABLE;
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ctrl |= DW_MMC_CTRL_DMA_ENABLE;
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} else {
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WR4(sc, DW_MMC_CTRL, ctrl);
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ctrl &= ~DW_MMC_CTRL_DMA_ENABLE;
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wmb();
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dw_mmc_configure_dma(sc);
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}
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}
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WR4(sc, DW_MMC_CTRL, ctrl);
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WR4(sc, DW_MMC_BLKSIZ, MIN(count_bytes, MMC_SECTOR_SIZE));
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WR4(sc, DW_MMC_BLKSIZ, MIN(count_bytes, MMC_SECTOR_SIZE));
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WR4(sc, DW_MMC_BYTCNT, count_bytes);
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WR4(sc, DW_MMC_BYTCNT, count_bytes);
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