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Update files to match FreeBSD layout

Browse Source 
Add compatibility with Newlib header files.  Some FreeBSD header files
are mapped by the translation script:

     o rtems/bsd/sys/_types.h
     o rtems/bsd/sys/errno.h
     o rtems/bsd/sys/lock.h
     o rtems/bsd/sys/param.h
     o rtems/bsd/sys/resource.h
     o rtems/bsd/sys/time.h
     o rtems/bsd/sys/timespec.h
     o rtems/bsd/sys/types.h
     o rtems/bsd/sys/unistd.h

It is now possible to include <sys/socket.h> directly for example.

Generate one Makefile which builds everything including tests.
This commit is contained in:
Sebastian Huber
2013-10-09 22:52:54 +02:00
parent bceabc95c1
commit e599318e91
1305 changed files with 43694 additions and 40629 deletions
Download Patch File Download Diff File Expand all files Collapse all files

77
freebsd/sys/m68k/include/machine/in_cksum.h Normal file
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/*-
* Copyright (c) 1990 The Regents of the University of California.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* from tahoe: in_cksum.c 1.2 86/01/05
* from: @(#)in_cksum.c 1.3 (Berkeley) 1/19/91
* from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp
* from: src/sys/alpha/include/in_cksum.h,v 1.7 2005/03/02 21:33:20 joerg
* $FreeBSD$
*/
#ifndef _MACHINE_IN_CKSUM_H_
#define _MACHINE_IN_CKSUM_H_ 1
#include <sys/cdefs.h>
#define in_cksum(m, len) in_cksum_skip(m, len, 0)
/*
* It it useful to have an Internet checksum routine which is inlineable
* and optimized specifically for the task of computing IP header checksums
* in the normal case (where there are no options and the header length is
* therefore always exactly five 32-bit words.
*/
#ifdef __CC_SUPPORTS___INLINE
static __inline void
in_cksum_update(struct ip *ip)
{
int __tmpsum;
__tmpsum = (int)ntohs(ip->ip_sum) + 256;
ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16));
}
#else
#define in_cksum_update(ip) \
do { \
int __tmpsum; \
__tmpsum = (int)ntohs(ip->ip_sum) + 256; \
ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16)); \
} while(0)
#endif
#ifdef _KERNEL
u_int in_cksum_hdr(const struct ip *ip);
u_short in_addword(u_short sum, u_short b);
u_short in_pseudo(u_int sum, u_int b, u_int c);
u_short in_cksum_skip(struct mbuf *m, int len, int skip);
#endif
#endif /* _MACHINE_IN_CKSUM_H_ */

57
freebsd/sys/m68k/include/machine/legacyvar.h Normal file
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/*-
* Copyright (c) 2000 Peter Wemm <peter@FreeBSD.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MACHINE_LEGACYVAR_H_
#define _MACHINE_LEGACYVAR_H_
enum legacy_device_ivars {
LEGACY_IVAR_PCIDOMAIN,
LEGACY_IVAR_PCIBUS
};
#define LEGACY_ACCESSOR(var, ivar, type) \
__BUS_ACCESSOR(legacy, var, LEGACY, ivar, type)
LEGACY_ACCESSOR(pcidomain, PCIDOMAIN, uint32_t)
LEGACY_ACCESSOR(pcibus, PCIBUS, uint32_t)
#undef LEGACY_ACCESSOR
int legacy_pcib_maxslots(device_t dev);
uint32_t legacy_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, int bytes);
int legacy_pcib_read_ivar(device_t dev, device_t child, int which,
uintptr_t *result);
void legacy_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, u_int32_t data, int bytes);
int legacy_pcib_write_ivar(device_t dev, device_t child, int which,
uintptr_t value);
struct resource *legacy_pcib_alloc_resource(device_t dev, device_t child,
int type, int *rid, u_long start, u_long end, u_long count, u_int flags);
#endif /* !_MACHINE_LEGACYVAR_H_ */

52
freebsd/sys/m68k/include/machine/pci_cfgreg.h Normal file
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/*-
* Copyright (c) 1997, Stefan Esser <se@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* $FreeBSD$
*
*/
#define CONF1_ADDR_PORT 0x0cf8
#define CONF1_DATA_PORT 0x0cfc
#define CONF1_ENABLE 0x80000000ul
#define CONF1_ENABLE_CHK 0x80000000ul
#define CONF1_ENABLE_MSK 0x7f000000ul
#define CONF1_ENABLE_CHK1 0xff000001ul
#define CONF1_ENABLE_MSK1 0x80000001ul
#define CONF1_ENABLE_RES1 0x80000000ul
#define CONF2_ENABLE_PORT 0x0cf8
#define CONF2_FORWARD_PORT 0x0cfa
#define CONF2_ENABLE_CHK 0x0e
#define CONF2_ENABLE_RES 0x0e
int pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus);
int pci_cfgregopen(void);
u_int32_t pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
void pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
void pci_pir_open(void);
int pci_pir_probe(int bus, int require_parse);
int pci_pir_route_interrupt(int bus, int device, int func, int pin);

255
freebsd/sys/m68k/m68k/in_cksum.c Normal file
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#include <machine/rtems-bsd-config.h>
/*-
* Copyright (c) 1988, 1992, 1993
* The Regents of the University of California. All rights reserved.
* Copyright (c) 1996
* Matt Thomas <matt@3am-software.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)in_cksum.c 8.1 (Berkeley) 6/10/93
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <rtems/bsd/sys/param.h>
#include <sys/mbuf.h>
#include <sys/systm.h>
#include <netinet/in_systm.h>
#include <netinet/in.h>
#include <netinet/ip.h>
#include <machine/in_cksum.h>
/*
* Checksum routine for Internet Protocol family headers
* (Portable Alpha version).
*
* This routine is very heavily used in the network
* code and should be modified for each CPU to be as fast as possible.
*/
#define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
#define REDUCE32 \
{ \
q_util.q = sum; \
sum = q_util.s[0] + q_util.s[1] + q_util.s[2] + q_util.s[3]; \
}
#define REDUCE16 \
{ \
q_util.q = sum; \
l_util.l = q_util.s[0] + q_util.s[1] + q_util.s[2] + q_util.s[3]; \
sum = l_util.s[0] + l_util.s[1]; \
ADDCARRY(sum); \
}
static const u_int32_t in_masks[] = {
#if _BYTE_ORDER == _LITTLE_ENDIAN
/*0 bytes*/ /*1 byte*/ /*2 bytes*/ /*3 bytes*/
0x00000000, 0x000000FF, 0x0000FFFF, 0x00FFFFFF, /* offset 0 */
0x00000000, 0x0000FF00, 0x00FFFF00, 0xFFFFFF00, /* offset 1 */
0x00000000, 0x00FF0000, 0xFFFF0000, 0xFFFF0000, /* offset 2 */
0x00000000, 0xFF000000, 0xFF000000, 0xFF000000, /* offset 3 */
#else
/*0 bytes*/ /*1 byte*/ /*2 bytes*/ /*3 bytes*/
0x00000000, 0xFF000000, 0xFFFF0000, 0xFFFFFF00, /* offset 0 */
0x00000000, 0x00FF0000, 0x00FFFF00, 0x00FFFFFF, /* offset 1 */
0x00000000, 0x0000FF00, 0x0000FFFF, 0x0000FFFF, /* offset 2 */
0x00000000, 0x000000FF, 0x000000FF, 0x000000FF, /* offset 3 */
#endif
};
union l_util {
u_int16_t s[2];
u_int32_t l;
};
union q_util {
u_int16_t s[4];
u_int32_t l[2];
u_int64_t q;
};
static u_int64_t
in_cksumdata(const void *buf, int len)
{
const u_int32_t *lw = (const u_int32_t *) buf;
u_int64_t sum = 0;
u_int64_t prefilled;
int offset;
union q_util q_util;
if ((3 & (long) lw) == 0 && len == 20) {
sum = (u_int64_t) lw[0] + lw[1] + lw[2] + lw[3] + lw[4];
REDUCE32;
return sum;
}
if ((offset = 3 & (long) lw) != 0) {
const u_int32_t *masks = in_masks + (offset << 2);
lw = (u_int32_t *) (((long) lw) - offset);
sum = *lw++ & masks[len >= 3 ? 3 : len];
len -= 4 - offset;
if (len <= 0) {
REDUCE32;
return sum;
}
}
#if 0
/*
* Force to cache line boundary.
*/
offset = 32 - (0x1f & (long) lw);
if (offset < 32 && len > offset) {
len -= offset;
if (4 & offset) {
sum += (u_int64_t) lw[0];
lw += 1;
}
if (8 & offset) {
sum += (u_int64_t) lw[0] + lw[1];
lw += 2;
}
if (16 & offset) {
sum += (u_int64_t) lw[0] + lw[1] + lw[2] + lw[3];
lw += 4;
}
}
#endif
/*
* access prefilling to start load of next cache line.
* then add current cache line
* save result of prefilling for loop iteration.
*/
prefilled = lw[0];
while ((len -= 32) >= 4) {
u_int64_t prefilling = lw[8];
sum += prefilled + lw[1] + lw[2] + lw[3]
+ lw[4] + lw[5] + lw[6] + lw[7];
lw += 8;
prefilled = prefilling;
}
if (len >= 0) {
sum += prefilled + lw[1] + lw[2] + lw[3]
+ lw[4] + lw[5] + lw[6] + lw[7];
lw += 8;
} else {
len += 32;
}
while ((len -= 16) >= 0) {
sum += (u_int64_t) lw[0] + lw[1] + lw[2] + lw[3];
lw += 4;
}
len += 16;
while ((len -= 4) >= 0) {
sum += (u_int64_t) *lw++;
}
len += 4;
if (len > 0)
sum += (u_int64_t) (in_masks[len] & *lw);
REDUCE32;
return sum;
}
u_short
in_addword(u_short a, u_short b)
{
u_int64_t sum = a + b;
ADDCARRY(sum);
return (sum);
}
u_short
#ifdef __rtems__
/* Prototype does not match in FreeBSD code */
in_pseudo(u_int a, u_int b, u_int c)
#else
in_pseudo(u_int32_t a, u_int32_t b, u_int32_t c)
#endif
{
u_int64_t sum;
union q_util q_util;
union l_util l_util;
sum = (u_int64_t) a + b + c;
REDUCE16;
return (sum);
}
u_short
in_cksum_skip(struct mbuf *m, int len, int skip)
{
u_int64_t sum = 0;
int mlen = 0;
int clen = 0;
caddr_t addr;
union q_util q_util;
union l_util l_util;
len -= skip;
for (; skip && m; m = m->m_next) {
if (m->m_len > skip) {
mlen = m->m_len - skip;
addr = mtod(m, caddr_t) + skip;
goto skip_start;
} else {
skip -= m->m_len;
}
}
for (; m && len; m = m->m_next) {
if (m->m_len == 0)
continue;
mlen = m->m_len;
addr = mtod(m, caddr_t);
skip_start:
if (len < mlen)
mlen = len;
if ((clen ^ (uintptr_t) addr) & 1)
sum += in_cksumdata(addr, mlen) << 8;
else
sum += in_cksumdata(addr, mlen);
clen += mlen;
len -= mlen;
}
REDUCE16;
return (~sum & 0xffff);
}
u_int in_cksum_hdr(const struct ip *ip)
{
u_int64_t sum = in_cksumdata(ip, sizeof(struct ip));
union q_util q_util;
union l_util l_util;
REDUCE16;
return (~sum & 0xffff);
}

347
freebsd/sys/m68k/m68k/legacy.c Normal file
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#include <machine/rtems-bsd-config.h>
/*-
* Copyright 1998 Massachusetts Institute of Technology
*
* Permission to use, copy, modify, and distribute this software and
* its documentation for any purpose and without fee is hereby
* granted, provided that both the above copyright notice and this
* permission notice appear in all copies, that both the above
* copyright notice and this permission notice appear in all
* supporting documentation, and that the name of M.I.T. not be used
* in advertising or publicity pertaining to distribution of the
* software without specific, written prior permission. M.I.T. makes
* no representations about the suitability of this software for any
* purpose. It is provided "as is" without express or implied
* warranty.
*
* THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS
* ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT
* SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/*
* This code implements a system driver for legacy systems that do not
* support ACPI or when ACPI support is not present in the kernel.
*/
#include <rtems/bsd/sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/cpu.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/module.h>
#include <machine/bus.h>
#include <sys/pcpu.h>
#include <sys/rman.h>
#include <sys/smp.h>
#ifndef __rtems__
#include <rtems/bsd/local/opt_mca.h>
#endif /* __rtems__ */
#ifdef DEV_MCA
#include <i386/bios/mca_machdep.h>
#endif
#include <machine/legacyvar.h>
#include <machine/resource.h>
static MALLOC_DEFINE(M_LEGACYDEV, "legacydrv", "legacy system device");
struct legacy_device {
int lg_pcibus;
};
#define DEVTOAT(dev) ((struct legacy_device *)device_get_ivars(dev))
static int legacy_probe(device_t);
static int legacy_attach(device_t);
static int legacy_print_child(device_t, device_t);
static device_t legacy_add_child(device_t bus, u_int order, const char *name,
int unit);
static int legacy_read_ivar(device_t, device_t, int, uintptr_t *);
static int legacy_write_ivar(device_t, device_t, int, uintptr_t);
static device_method_t legacy_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, legacy_probe),
DEVMETHOD(device_attach, legacy_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, legacy_print_child),
DEVMETHOD(bus_add_child, legacy_add_child),
DEVMETHOD(bus_read_ivar, legacy_read_ivar),
DEVMETHOD(bus_write_ivar, legacy_write_ivar),
DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource),
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
{ 0, 0 }
};
static driver_t legacy_driver = {
"legacy",
legacy_methods,
1, /* no softc */
};
static devclass_t legacy_devclass;
DRIVER_MODULE(legacy, nexus, legacy_driver, legacy_devclass, 0, 0);
static int
legacy_probe(device_t dev)
{
device_set_desc(dev, "legacy system");
device_quiet(dev);
return (0);
}
static int
legacy_attach(device_t dev)
{
device_t child;
/*
* Let our child drivers identify any child devices that they
* can find. Once that is done attach any devices that we
* found.
*/
bus_generic_probe(dev);
bus_generic_attach(dev);
#ifndef PC98
/*
* If we didn't see EISA or ISA on a pci bridge, create some
* connection points now so they show up "on motherboard".
*/
if (!devclass_get_device(devclass_find("eisa"), 0)) {
child = BUS_ADD_CHILD(dev, 0, "eisa", 0);
if (child == NULL)
panic("legacy_attach eisa");
device_probe_and_attach(child);
}
#endif
#ifdef DEV_MCA
if (MCA_system && !devclass_get_device(devclass_find("mca"), 0)) {
child = BUS_ADD_CHILD(dev, 0, "mca", 0);
if (child == 0)
panic("legacy_probe mca");
device_probe_and_attach(child);
}
#endif
if (!devclass_get_device(devclass_find("isa"), 0)) {
child = BUS_ADD_CHILD(dev, 0, "isa", 0);
if (child == NULL)
panic("legacy_attach isa");
device_probe_and_attach(child);
}
return 0;
}
static int
legacy_print_child(device_t bus, device_t child)
{
struct legacy_device *atdev = DEVTOAT(child);
int retval = 0;
retval += bus_print_child_header(bus, child);
if (atdev->lg_pcibus != -1)
retval += printf(" pcibus %d", atdev->lg_pcibus);
retval += printf(" on motherboard\n"); /* XXX "motherboard", ick */
return (retval);
}
static device_t
legacy_add_child(device_t bus, u_int order, const char *name, int unit)
{
device_t child;
struct legacy_device *atdev;
atdev = malloc(sizeof(struct legacy_device), M_LEGACYDEV,
M_NOWAIT | M_ZERO);
if (atdev == NULL)
return(NULL);
atdev->lg_pcibus = -1;
child = device_add_child_ordered(bus, order, name, unit);
if (child == NULL)
free(atdev, M_LEGACYDEV);
else
/* should we free this in legacy_child_detached? */
device_set_ivars(child, atdev);
return (child);
}
static int
legacy_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
struct legacy_device *atdev = DEVTOAT(child);
switch (which) {
case LEGACY_IVAR_PCIDOMAIN:
*result = 0;
break;
case LEGACY_IVAR_PCIBUS:
*result = atdev->lg_pcibus;
break;
default:
return ENOENT;
}
return 0;
}
static int
legacy_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
{
struct legacy_device *atdev = DEVTOAT(child);
switch (which) {
case LEGACY_IVAR_PCIDOMAIN:
return EINVAL;
case LEGACY_IVAR_PCIBUS:
atdev->lg_pcibus = value;
break;
default:
return ENOENT;
}
return 0;
}
/*
* Legacy CPU attachment when ACPI is not available. Drivers like
* cpufreq(4) hang off this.
*/
static void cpu_identify(driver_t *driver, device_t parent);
static int cpu_read_ivar(device_t dev, device_t child, int index,
uintptr_t *result);
static device_t cpu_add_child(device_t bus, u_int order, const char *name,
int unit);
static struct resource_list *cpu_get_rlist(device_t dev, device_t child);
struct cpu_device {
struct resource_list cd_rl;
struct pcpu *cd_pcpu;
};
static device_method_t cpu_methods[] = {
/* Device interface */
DEVMETHOD(device_identify, cpu_identify),
DEVMETHOD(device_probe, bus_generic_probe),
DEVMETHOD(device_attach, bus_generic_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_add_child, cpu_add_child),
DEVMETHOD(bus_read_ivar, cpu_read_ivar),
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_get_resource_list, cpu_get_rlist),
DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
DEVMETHOD(bus_driver_added, bus_generic_driver_added),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
{ 0, 0 }
};
static driver_t cpu_driver = {
"cpu",
cpu_methods,
1, /* no softc */
};
static devclass_t cpu_devclass;
DRIVER_MODULE(cpu, legacy, cpu_driver, cpu_devclass, 0, 0);
static void
cpu_identify(driver_t *driver, device_t parent)
{
device_t child;
int i;
/*
* Attach a cpuX device for each CPU. We use an order of 150
* so that these devices are attached after the Host-PCI
* bridges (which are added at order 100).
*/
for (i = 0; i <= mp_maxid; i++)
if (!CPU_ABSENT(i)) {
child = BUS_ADD_CHILD(parent, 150, "cpu", i);
if (child == NULL)
panic("legacy_attach cpu");
}
}
static device_t
cpu_add_child(device_t bus, u_int order, const char *name, int unit)
{
struct cpu_device *cd;
device_t child;
struct pcpu *pc;
if ((cd = malloc(sizeof(*cd), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL)
return (NULL);
resource_list_init(&cd->cd_rl);
pc = pcpu_find(device_get_unit(bus));
cd->cd_pcpu = pc;
child = device_add_child_ordered(bus, order, name, unit);
if (child != NULL) {
pc->pc_device = child;
device_set_ivars(child, cd);
} else
free(cd, M_DEVBUF);
return (child);
}
static struct resource_list *
cpu_get_rlist(device_t dev, device_t child)
{
struct cpu_device *cpdev;
cpdev = device_get_ivars(child);
return (&cpdev->cd_rl);
}
static int
cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
{
struct cpu_device *cpdev;
if (index != CPU_IVAR_PCPU)
return (ENOENT);
cpdev = device_get_ivars(child);
*result = (uintptr_t)cpdev->cd_pcpu;
return (0);
}

729
freebsd/sys/m68k/pci/pci_bus.c Normal file
View File

@@ -0,0 +1,729 @@
#include <machine/rtems-bsd-config.h>
/*-
* Copyright (c) 1997, Stefan Esser <se@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <rtems/bsd/local/opt_cpu.h>
#include <rtems/bsd/sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/malloc.h>
#include <sys/module.h>
#include <sys/sysctl.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcib_private.h>
#include <isa/isavar.h>
#ifdef CPU_ELAN
#include <machine/md_var.h>
#endif
#include <machine/legacyvar.h>
#include <machine/pci_cfgreg.h>
#include <machine/resource.h>
#include <rtems/bsd/local/pcib_if.h>
#ifndef __rtems__
static int pcibios_pcib_route_interrupt(device_t pcib, device_t dev,
int pin);
#else /* __rtems__ */
int pcibios_pcib_route_interrupt(device_t pcib, device_t dev, int pin);
#endif /* __rtems__ */
int
legacy_pcib_maxslots(device_t dev)
{
return 31;
}
/* read configuration space register */
#ifdef __rtems__
uint32_t
legacy_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, int bytes)
#else
u_int32_t
legacy_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, int bytes)
#endif
{
return(pci_cfgregread(bus, slot, func, reg, bytes));
}
/* write configuration space register */
void
legacy_pcib_write_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, u_int32_t data, int bytes)
{
pci_cfgregwrite(bus, slot, func, reg, data, bytes);
}
/* Pass MSI requests up to the nexus. */
static int
legacy_pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount,
int *irqs)
{
device_t bus;
bus = device_get_parent(pcib);
return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
irqs));
}
static int
legacy_pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
{
device_t bus;
bus = device_get_parent(pcib);
return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
}
static int
legacy_pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
uint32_t *data)
{
device_t bus;
bus = device_get_parent(pcib);
return (PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data));
}
static const char *
legacy_pcib_is_host_bridge(int bus, int slot, int func,
uint32_t id, uint8_t class, uint8_t subclass,
uint8_t *busnum)
{
const char *s = NULL;
static uint8_t pxb[4]; /* hack for 450nx */
*busnum = 0;
switch (id) {
case 0x12258086:
s = "Intel 824?? host to PCI bridge";
/* XXX This is a guess */
/* *busnum = legacy_pcib_read_config(0, bus, slot, func, 0x41, 1); */
*busnum = bus;
break;
case 0x71208086:
s = "Intel 82810 (i810 GMCH) Host To Hub bridge";
break;
case 0x71228086:
s = "Intel 82810-DC100 (i810-DC100 GMCH) Host To Hub bridge";
break;
case 0x71248086:
s = "Intel 82810E (i810E GMCH) Host To Hub bridge";
break;
case 0x11308086:
s = "Intel 82815 (i815 GMCH) Host To Hub bridge";
break;
case 0x71808086:
s = "Intel 82443LX (440 LX) host to PCI bridge";
break;
case 0x71908086:
s = "Intel 82443BX (440 BX) host to PCI bridge";
break;
case 0x71928086:
s = "Intel 82443BX host to PCI bridge (AGP disabled)";
break;
case 0x71948086:
s = "Intel 82443MX host to PCI bridge";
break;
case 0x71a08086:
s = "Intel 82443GX host to PCI bridge";
break;
case 0x71a18086:
s = "Intel 82443GX host to AGP bridge";
break;
case 0x71a28086:
s = "Intel 82443GX host to PCI bridge (AGP disabled)";
break;
case 0x84c48086:
s = "Intel 82454KX/GX (Orion) host to PCI bridge";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0x4a, 1);
break;
case 0x84ca8086:
/*
* For the 450nx chipset, there is a whole bundle of
* things pretending to be host bridges. The MIOC will
* be seen first and isn't really a pci bridge (the
* actual busses are attached to the PXB's). We need to
* read the registers of the MIOC to figure out the
* bus numbers for the PXB channels.
*
* Since the MIOC doesn't have a pci bus attached, we
* pretend it wasn't there.
*/
pxb[0] = legacy_pcib_read_config(0, bus, slot, func,
0xd0, 1); /* BUSNO[0] */
pxb[1] = legacy_pcib_read_config(0, bus, slot, func,
0xd1, 1) + 1; /* SUBA[0]+1 */
pxb[2] = legacy_pcib_read_config(0, bus, slot, func,
0xd3, 1); /* BUSNO[1] */
pxb[3] = legacy_pcib_read_config(0, bus, slot, func,
0xd4, 1) + 1; /* SUBA[1]+1 */
return NULL;
case 0x84cb8086:
switch (slot) {
case 0x12:
s = "Intel 82454NX PXB#0, Bus#A";
*busnum = pxb[0];
break;
case 0x13:
s = "Intel 82454NX PXB#0, Bus#B";
*busnum = pxb[1];
break;
case 0x14:
s = "Intel 82454NX PXB#1, Bus#A";
*busnum = pxb[2];
break;
case 0x15:
s = "Intel 82454NX PXB#1, Bus#B";
*busnum = pxb[3];
break;
}
break;
case 0x1A308086:
s = "Intel 82845 Host to PCI bridge";
break;
/* AMD -- vendor 0x1022 */
case 0x30001022:
s = "AMD Elan SC520 host to PCI bridge";
#ifdef CPU_ELAN
init_AMD_Elan_sc520();
#else
printf(
"*** WARNING: missing CPU_ELAN -- timekeeping may be wrong\n");
#endif
break;
case 0x70061022:
s = "AMD-751 host to PCI bridge";
break;
case 0x700e1022:
s = "AMD-761 host to PCI bridge";
break;
/* SiS -- vendor 0x1039 */
case 0x04961039:
s = "SiS 85c496";
break;
case 0x04061039:
s = "SiS 85c501";
break;
case 0x06011039:
s = "SiS 85c601";
break;
case 0x55911039:
s = "SiS 5591 host to PCI bridge";
break;
case 0x00011039:
s = "SiS 5591 host to AGP bridge";
break;
/* VLSI -- vendor 0x1004 */
case 0x00051004:
s = "VLSI 82C592 Host to PCI bridge";
break;
/* XXX Here is MVP3, I got the datasheet but NO M/B to test it */
/* totally. Please let me know if anything wrong. -F */
/* XXX need info on the MVP3 -- any takers? */
case 0x05981106:
s = "VIA 82C598MVP (Apollo MVP3) host bridge";
break;
/* AcerLabs -- vendor 0x10b9 */
/* Funny : The datasheet told me vendor id is "10b8",sub-vendor */
/* id is '10b9" but the register always shows "10b9". -Foxfair */
case 0x154110b9:
s = "AcerLabs M1541 (Aladdin-V) PCI host bridge";
break;
/* OPTi -- vendor 0x1045 */
case 0xc7011045:
s = "OPTi 82C700 host to PCI bridge";
break;
case 0xc8221045:
s = "OPTi 82C822 host to PCI Bridge";
break;
/* ServerWorks -- vendor 0x1166 */
case 0x00051166:
s = "ServerWorks NB6536 2.0HE host to PCI bridge";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
break;
case 0x00061166:
/* FALLTHROUGH */
case 0x00081166:
/* FALLTHROUGH */
case 0x02011166:
/* FALLTHROUGH */
case 0x010f1014: /* IBM re-badged ServerWorks chipset */
s = "ServerWorks host to PCI bridge";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
break;
case 0x00091166:
s = "ServerWorks NB6635 3.0LE host to PCI bridge";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
break;
case 0x00101166:
s = "ServerWorks CIOB30 host to PCI bridge";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
break;
case 0x00111166:
/* FALLTHROUGH */
case 0x03021014: /* IBM re-badged ServerWorks chipset */
s = "ServerWorks CMIC-HE host to PCI-X bridge";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
break;
/* XXX unknown chipset, but working */
case 0x00171166:
/* FALLTHROUGH */
case 0x01011166:
case 0x01101166:
case 0x02251166:
s = "ServerWorks host to PCI bridge(unknown chipset)";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0x44, 1);
break;
/* Compaq/HP -- vendor 0x0e11 */
case 0x60100e11:
s = "Compaq/HP Model 6010 HotPlug PCI Bridge";
*busnum = legacy_pcib_read_config(0, bus, slot, func, 0xc8, 1);
break;
/* Integrated Micro Solutions -- vendor 0x10e0 */
case 0x884910e0:
s = "Integrated Micro Solutions VL Bridge";
break;
default:
if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_HOST)
s = "Host to PCI bridge";
break;
}
return s;
}
/*
* Scan the first pci bus for host-pci bridges and add pcib instances
* to the nexus for each bridge.
*/
static void
legacy_pcib_identify(driver_t *driver, device_t parent)
{
int bus, slot, func;
u_int8_t hdrtype;
int found = 0;
int pcifunchigh;
int found824xx = 0;
int found_orion = 0;
device_t child;
devclass_t pci_devclass;
if (pci_cfgregopen() == 0)
return;
/*
* Check to see if we haven't already had a PCI bus added
* via some other means. If we have, bail since otherwise
* we're going to end up duplicating it.
*/
if ((pci_devclass = devclass_find("pci")) &&
devclass_get_device(pci_devclass, 0))
return;
bus = 0;
retry:
for (slot = 0; slot <= PCI_SLOTMAX; slot++) {
func = 0;
hdrtype = legacy_pcib_read_config(0, bus, slot, func,
PCIR_HDRTYPE, 1);
/*
* When enumerating bus devices, the standard says that
* one should check the header type and ignore the slots whose
* header types that the software doesn't know about. We use
* this to filter out devices.
*/
if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE)
continue;
if ((hdrtype & PCIM_MFDEV) &&
(!found_orion || hdrtype != 0xff))
pcifunchigh = PCI_FUNCMAX;
else
pcifunchigh = 0;
for (func = 0; func <= pcifunchigh; func++) {
/*
* Read the IDs and class from the device.
*/
u_int32_t id;
u_int8_t class, subclass, busnum;
const char *s;
device_t *devs;
int ndevs, i;
id = legacy_pcib_read_config(0, bus, slot, func,
PCIR_DEVVENDOR, 4);
if (id == -1)
continue;
class = legacy_pcib_read_config(0, bus, slot, func,
PCIR_CLASS, 1);
subclass = legacy_pcib_read_config(0, bus, slot, func,
PCIR_SUBCLASS, 1);
s = legacy_pcib_is_host_bridge(bus, slot, func,
id, class, subclass,
&busnum);
if (s == NULL)
continue;
/*
* Check to see if the physical bus has already
* been seen. Eg: hybrid 32 and 64 bit host
* bridges to the same logical bus.
*/
if (device_get_children(parent, &devs, &ndevs) == 0) {
for (i = 0; s != NULL && i < ndevs; i++) {
if (strcmp(device_get_name(devs[i]),
"pcib") != 0)
continue;
if (legacy_get_pcibus(devs[i]) == busnum)
s = NULL;
}
free(devs, M_TEMP);
}
if (s == NULL)
continue;
/*
* Add at priority 100 to make sure we
* go after any motherboard resources
*/
child = BUS_ADD_CHILD(parent, 100,
"pcib", busnum);
device_set_desc(child, s);
legacy_set_pcibus(child, busnum);
found = 1;
if (id == 0x12258086)
found824xx = 1;
if (id == 0x84c48086)
found_orion = 1;
}
}
if (found824xx && bus == 0) {
bus++;
goto retry;
}
/*
* Make sure we add at least one bridge since some old
* hardware doesn't actually have a host-pci bridge device.
* Note that pci_cfgregopen() thinks we have PCI devices..
*/
if (!found) {
if (bootverbose)
printf(
"legacy_pcib_identify: no bridge found, adding pcib0 anyway\n");
child = BUS_ADD_CHILD(parent, 100, "pcib", 0);
legacy_set_pcibus(child, 0);
}
}
static int
legacy_pcib_probe(device_t dev)
{
if (pci_cfgregopen() == 0)
return ENXIO;
return -100;
}
static int
legacy_pcib_attach(device_t dev)
{
device_t pir;
int bus;
/*
* Look for a PCI BIOS interrupt routing table as that will be
* our method of routing interrupts if we have one.
*/
bus = pcib_get_bus(dev);
#ifndef __rtems__
if (pci_pir_probe(bus, 0)) {
pir = BUS_ADD_CHILD(device_get_parent(dev), 0, "pir", 0);
if (pir != NULL)
device_probe_and_attach(pir);
}
#else /* __rtems__ */
#endif /* __rtems__ */
device_add_child(dev, "pci", bus);
return bus_generic_attach(dev);
}
int
legacy_pcib_read_ivar(device_t dev, device_t child, int which,
uintptr_t *result)
{
switch (which) {
case PCIB_IVAR_DOMAIN:
*result = 0;
return 0;
case PCIB_IVAR_BUS:
*result = legacy_get_pcibus(dev);
return 0;
}
return ENOENT;
}
int
legacy_pcib_write_ivar(device_t dev, device_t child, int which,
uintptr_t value)
{
switch (which) {
case PCIB_IVAR_DOMAIN:
return EINVAL;
case PCIB_IVAR_BUS:
legacy_set_pcibus(dev, value);
return 0;
}
return ENOENT;
}
SYSCTL_DECL(_hw_pci);
static unsigned long legacy_host_mem_start = 0x80000000;
TUNABLE_ULONG("hw.pci.host_mem_start", &legacy_host_mem_start);
SYSCTL_ULONG(_hw_pci, OID_AUTO, host_mem_start, CTLFLAG_RDTUN,
&legacy_host_mem_start, 0x80000000,
"Limit the host bridge memory to being above this address. Must be\n\
set at boot via a tunable.");
struct resource *
legacy_pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
/*
* If no memory preference is given, use upper 32MB slot most
* bioses use for their memory window. Typically other bridges
* before us get in the way to assert their preferences on memory.
* Hardcoding like this sucks, so a more MD/MI way needs to be
* found to do it. This is typically only used on older laptops
* that don't have pci busses behind pci bridge, so assuming > 32MB
* is liekly OK.
*
* However, this can cause problems for other chipsets, so we make
* this tunable by hw.pci.host_mem_start.
*/
if (type == SYS_RES_MEMORY && start == 0UL && end == ~0UL)
start = legacy_host_mem_start;
if (type == SYS_RES_IOPORT && start == 0UL && end == ~0UL)
start = 0x1000;
return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
count, flags));
}
static device_method_t legacy_pcib_methods[] = {
/* Device interface */
DEVMETHOD(device_identify, legacy_pcib_identify),
DEVMETHOD(device_probe, legacy_pcib_probe),
DEVMETHOD(device_attach, legacy_pcib_attach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_read_ivar, legacy_pcib_read_ivar),
DEVMETHOD(bus_write_ivar, legacy_pcib_write_ivar),
DEVMETHOD(bus_alloc_resource, legacy_pcib_alloc_resource),
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
/* pcib interface */
DEVMETHOD(pcib_maxslots, legacy_pcib_maxslots),
DEVMETHOD(pcib_read_config, legacy_pcib_read_config),
DEVMETHOD(pcib_write_config, legacy_pcib_write_config),
DEVMETHOD(pcib_route_interrupt, pcibios_pcib_route_interrupt),
DEVMETHOD(pcib_alloc_msi, legacy_pcib_alloc_msi),
DEVMETHOD(pcib_release_msi, pcib_release_msi),
DEVMETHOD(pcib_alloc_msix, legacy_pcib_alloc_msix),
DEVMETHOD(pcib_release_msix, pcib_release_msix),
DEVMETHOD(pcib_map_msi, legacy_pcib_map_msi),
{ 0, 0 }
};
static devclass_t hostb_devclass;
DEFINE_CLASS_0(pcib, legacy_pcib_driver, legacy_pcib_methods, 1);
DRIVER_MODULE(pcib, legacy, legacy_pcib_driver, hostb_devclass, 0, 0);
#ifndef __rtems__
/*
* Install placeholder to claim the resources owned by the
* PCI bus interface. This could be used to extract the
* config space registers in the extreme case where the PnP
* ID is available and the PCI BIOS isn't, but for now we just
* eat the PnP ID and do nothing else.
*
* XXX we should silence this probe, as it will generally confuse
* people.
*/
static struct isa_pnp_id pcibus_pnp_ids[] = {
{ 0x030ad041 /* PNP0A03 */, "PCI Bus" },
{ 0x080ad041 /* PNP0A08 */, "PCIe Bus" },
{ 0 }
};
static int
pcibus_pnp_probe(device_t dev)
{
int result;
if ((result = ISA_PNP_PROBE(device_get_parent(dev), dev, pcibus_pnp_ids)) <= 0)
device_quiet(dev);
return(result);
}
static int
pcibus_pnp_attach(device_t dev)
{
return(0);
}
static device_method_t pcibus_pnp_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, pcibus_pnp_probe),
DEVMETHOD(device_attach, pcibus_pnp_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
{ 0, 0 }
};
static devclass_t pcibus_pnp_devclass;
DEFINE_CLASS_0(pcibus_pnp, pcibus_pnp_driver, pcibus_pnp_methods, 1);
DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, 0, 0);
/*
* Provide a PCI-PCI bridge driver for PCI busses behind PCI-PCI bridges
* that appear in the PCIBIOS Interrupt Routing Table to use the routing
* table for interrupt routing when possible.
*/
static int pcibios_pcib_probe(device_t bus);
static device_method_t pcibios_pcib_pci_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, pcibios_pcib_probe),
DEVMETHOD(device_attach, pcib_attach),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_read_ivar, pcib_read_ivar),
DEVMETHOD(bus_write_ivar, pcib_write_ivar),
DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
DEVMETHOD(bus_release_resource, bus_generic_release_resource),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
/* pcib interface */
DEVMETHOD(pcib_maxslots, pcib_maxslots),
DEVMETHOD(pcib_read_config, pcib_read_config),
DEVMETHOD(pcib_write_config, pcib_write_config),
DEVMETHOD(pcib_route_interrupt, pcibios_pcib_route_interrupt),
DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
DEVMETHOD(pcib_release_msi, pcib_release_msi),
DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
DEVMETHOD(pcib_release_msix, pcib_release_msix),
DEVMETHOD(pcib_map_msi, pcib_map_msi),
{0, 0}
};
static devclass_t pcib_devclass;
DEFINE_CLASS_0(pcib, pcibios_pcib_driver, pcibios_pcib_pci_methods,
sizeof(struct pcib_softc));
DRIVER_MODULE(pcibios_pcib, pci, pcibios_pcib_driver, pcib_devclass, 0, 0);
static int
pcibios_pcib_probe(device_t dev)
{
int bus;
if ((pci_get_class(dev) != PCIC_BRIDGE) ||
(pci_get_subclass(dev) != PCIS_BRIDGE_PCI))
return (ENXIO);
bus = pci_read_config(dev, PCIR_SECBUS_1, 1);
if (bus == 0)
return (ENXIO);
if (!pci_pir_probe(bus, 1))
return (ENXIO);
device_set_desc(dev, "PCIBIOS PCI-PCI bridge");
return (-2000);
}
static int
pcibios_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
{
return (pci_pir_route_interrupt(pci_get_bus(dev), pci_get_slot(dev),
pci_get_function(dev), pin));
}
#endif /* __rtems__ */