mirror of
https://git.rtems.org/rtems-libbsd/
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307 lines
8.9 KiB
C
307 lines
8.9 KiB
C
/*
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* Copyright (c) 2012 embedded brains GmbH. All rights reserved.
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*
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* embedded brains GmbH
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* Dornierstr. 4
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* 82178 Puchheim
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* Germany
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* <info@embedded-brains.de>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <dev/usb/usb_otg_transceiver.h>
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#define COUNT(array) (sizeof(array) / sizeof(array [0]))
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#define USB_OTG_CONTROL_1_SPEED_REG (1 << 0)
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#define USB_OTG_CONTROL_1_SUSPEND_REG (1 << 1)
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#define USB_OTG_CONTROL_1_DAT_SE0 (1 << 2)
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#define USB_OTG_CONTROL_1_TRANSP_EN (1 << 3)
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#define USB_OTG_CONTROL_1_BDIS_ACON_EN (1 << 4)
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#define USB_OTG_CONTROL_1_OE_INT_EN (1 << 5)
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#define USB_OTG_CONTROL_1_UART_EN (1 << 6)
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/*
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* USB_OTG_CONTROL_3
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*
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* On ISP130x this is register MODE CONTROL 2
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* On STOTG04E this is register CONTROL 3
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*
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* 'rsrvd' = not available reserved bit.
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* 'diff' = different functionality.
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*
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* Bit Function ISP1301 ISP1302 STOTG04E
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* --------------------------------------------------------------
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* 0 PWR_DN Y Y rsrvd
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* 1 SPD_SUSP_CTRL Y rsrvd diff
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* 2 BI_DI Y rsrvd Y
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* 3 TRANSP_BDIR[0] Y Y Y
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* 4 TRANSP_BDIR[1] Y Y Y
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* 5 AUDIO_EN Y Y Y
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* 6 PSW_OE Y Y Y
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* 7 EN2V7 Y rsrvd Y
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*/
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/* ISP1301 & ISP1302 (Reserved on STOTG04E) */
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#define ISP130x_CONTROL_3_GLOBAL_PWR_DN (1 << 0)
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/* ISP1301 (ISP1302 reserved bit!) */
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#define ISP1301_CONTROL_3_SPD_SUSP_CTRL (1 << 1)
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/* STOTG04E (Different functionality!) */
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#define STOTG04E_CONTROL_3_RX_BIAS_EN ISP1301_CONTROL_3_SPD_SUSP_CTRL
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/* ISP1301 (ISP1302 reserved bit!) */
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#define ISP1301_CONTROL_3_BI_DI (1 << 2)
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/* STOTG04E */
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#define STOTG04E_CONTROL_3_RC_BIAS_EN (1 << 1)
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#define STOTG04E_CONTROL_3_BIDI_EN ISP1301_CONTROL_3_BI_DI
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/* ISP1301, ISP1302 & STOTG04E common definitions. */
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#define USB_OTG_CONTROL_3_TRANSP_BDIR0 (1 << 3)
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#define USB_OTG_CONTROL_3_TRANSP_BDIR1 (1 << 4)
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#define USB_OTG_CONTROL_3_AUDIO_EN (1 << 5)
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#define USB_OTG_CONTROL_3_PSW_OE (1 << 6)
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/* ISP1301 (ISP1302 reserved bit.) */
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#define ISP1301_CONTROL_3_EN2V7 (1 << 7)
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/* STOTG04E */
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#define STOTG04E_CONTROL_3_2V7_EN ISP1301_CONTROL_3_EN2V7
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/* Note: STOTG04E Control register 2 = ISP130x OTG Control register */
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#define USB_OTG_CONTROL_2_DP_PULLUP (1 << 0)
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#define USB_OTG_CONTROL_2_DM_PULLUP (1 << 1)
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#define USB_OTG_CONTROL_2_DP_PULLDOWN (1 << 2)
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#define USB_OTG_CONTROL_2_DM_PULLDOWN (1 << 3)
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#define USB_OTG_CONTROL_2_ID_PULLDOWN (1 << 4)
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#define USB_OTG_CONTROL_2_VBUS_DRV (1 << 5)
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#define USB_OTG_CONTROL_2_VBUS_DISCHRG (1 << 6)
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#define USB_OTG_CONTROL_2_VBUS_CHRG (1 << 7)
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/* ISP1302 specific */
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#define ISP1302_MISC_CONTROL_REG_BYPASS_DIS (1 << 0)
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#define ISP1302_MISC_CONTROL_SRP_INIT (1 << 1)
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#define ISP1302_MISC_CONTROL_DP_WKPU_EN (1 << 2)
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#define ISP1302_MISC_CONTROL_IDPU_DIS (1 << 3)
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#define ISP1302_MISC_CONTROL_UART_2V8_EN (1 << 4)
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#define ISP1302_MISC_CONTROL_FORCE_DP_LOW (1 << 6)
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#define ISP1302_MISC_CONTROL_FORCE_DP_HIGH (1 << 7)
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int usb_otg_transceiver_read(
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const struct usb_otg_transceiver *self,
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const uint8_t *reg_addrs,
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uint8_t *values,
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size_t count
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)
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{
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int eno = 0;
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size_t i;
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for (i = 0; eno == 0 && i < count; ++i) {
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eno = (*self->read)(self, reg_addrs [i], &values [i]);
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}
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return eno;
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}
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int usb_otg_transceiver_write(
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const struct usb_otg_transceiver *self,
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const struct usb_otg_transceiver_write_request *requests,
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size_t count
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)
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{
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int eno = 0;
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size_t i;
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for (i = 0; eno == 0 && i < count; ++i) {
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const struct usb_otg_transceiver_write_request *request = &requests [i];
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eno = (*self->write)(self, request->reg_addr, request->value);
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}
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return eno;
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}
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int usb_otg_transceiver_init(struct usb_otg_transceiver *self)
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{
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static const uint8_t reg_addrs [4] = {
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USB_OTG_VENDOR_ID_LOW,
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USB_OTG_VENDOR_ID_HIGH,
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USB_OTG_PRODUCT_ID_LOW,
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USB_OTG_PRODUCT_ID_HIGH
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};
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int eno;
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uint8_t values [4];
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eno = usb_otg_transceiver_read(self, reg_addrs, values, 4);
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if (eno == 0) {
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self->vendor_id = (uint16_t) ((values [1] << 8) | values [0]);
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self->product_id = (uint16_t) ((values [3] << 8) | values [2]);
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}
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return eno;
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}
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#define RESUME_SETUP_REQUESTS \
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{ USB_OTG_CONTROL_1_CLEAR, 0xff }, \
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{ USB_OTG_CONTROL_1_SET, USB_OTG_CONTROL_1_SPEED_REG }, \
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{ USB_OTG_CONTROL_3_CLEAR, 0xff }
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#define RESUME_FINALIZE_REQUESTS \
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{ USB_OTG_CONTROL_2_CLEAR, 0xff }, \
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{ USB_OTG_CONTROL_1_SET, USB_OTG_CONTROL_1_DAT_SE0 }, \
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{ \
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USB_OTG_CONTROL_2_SET, \
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USB_OTG_CONTROL_2_DM_PULLDOWN | USB_OTG_CONTROL_2_DP_PULLDOWN \
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}, \
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{ USB_OTG_INT_LATCH_CLEAR, 0xff }, \
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{ USB_OTG_INT_ENABLE_LOW_CLEAR, 0xff }, \
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{ USB_OTG_INT_ENABLE_HIGH_CLEAR, 0xff }
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int usb_otg_transceiver_resume(const struct usb_otg_transceiver *self)
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{
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static const struct usb_otg_transceiver_write_request
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default_requests [] = {
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RESUME_SETUP_REQUESTS,
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RESUME_FINALIZE_REQUESTS
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};
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static const struct usb_otg_transceiver_write_request
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isp1301_requests [] = {
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RESUME_SETUP_REQUESTS,
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{
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USB_OTG_CONTROL_3_SET,
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ISP1301_CONTROL_3_BI_DI
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| USB_OTG_CONTROL_3_PSW_OE
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| ISP1301_CONTROL_3_SPD_SUSP_CTRL
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},
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RESUME_FINALIZE_REQUESTS
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};
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static const struct usb_otg_transceiver_write_request
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isp1302_requests [] = {
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RESUME_SETUP_REQUESTS,
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{
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USB_OTG_CONTROL_3_SET,
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ISP1301_CONTROL_3_BI_DI | USB_OTG_CONTROL_3_PSW_OE
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}, {
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ISP1302_MISC_CONTROL_CLEAR,
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0xff
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}, {
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ISP1302_MISC_CONTROL_SET,
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ISP1302_MISC_CONTROL_UART_2V8_EN
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},
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RESUME_FINALIZE_REQUESTS
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};
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static const struct usb_otg_transceiver_write_request
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stotg04e_requests [] = {
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RESUME_SETUP_REQUESTS,
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{
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USB_OTG_CONTROL_3_SET,
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STOTG04E_CONTROL_3_BIDI_EN | USB_OTG_CONTROL_3_PSW_OE,
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},
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RESUME_FINALIZE_REQUESTS
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};
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int eno;
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const struct usb_otg_transceiver_write_request *requests;
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size_t count;
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switch (self->product_id) {
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case USB_OTG_PRODUCT_ID_ISP1301:
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requests = isp1301_requests;
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count = COUNT(isp1301_requests);
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break;
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case USB_OTG_PRODUCT_ID_ISP1302:
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requests = isp1302_requests;
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count = COUNT(isp1302_requests);
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break;
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case USB_OTG_PRODUCT_ID_STOTG04E:
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requests = stotg04e_requests;
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count = COUNT(stotg04e_requests);
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break;
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default:
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requests = default_requests;
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count = COUNT(default_requests);
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break;
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}
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eno = usb_otg_transceiver_write(self, requests, count);
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return eno;
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}
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int usb_otg_transceiver_suspend(const struct usb_otg_transceiver *self)
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{
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static const struct usb_otg_transceiver_write_request
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default_requests [] = {
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{
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USB_OTG_CONTROL_1_SET,
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USB_OTG_CONTROL_1_SUSPEND_REG
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}, {
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USB_OTG_CONTROL_1_CLEAR,
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USB_OTG_CONTROL_1_TRANSP_EN | USB_OTG_CONTROL_1_UART_EN
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}, {
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USB_OTG_CONTROL_2_CLEAR,
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USB_OTG_CONTROL_2_DP_PULLUP
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| USB_OTG_CONTROL_2_DM_PULLUP
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| USB_OTG_CONTROL_2_ID_PULLDOWN
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| USB_OTG_CONTROL_2_VBUS_DRV
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| USB_OTG_CONTROL_2_VBUS_CHRG
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}, {
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USB_OTG_CONTROL_3_SET,
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USB_OTG_CONTROL_3_PSW_OE
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}, {
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USB_OTG_CONTROL_3_CLEAR,
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USB_OTG_CONTROL_3_AUDIO_EN
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}
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};
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int eno;
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const struct usb_otg_transceiver_write_request *requests;
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size_t count;
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requests = default_requests;
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count = COUNT(default_requests);
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eno = usb_otg_transceiver_write(self, requests, count);
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return eno;
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}
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int usb_otg_transceiver_set_vbus(
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const struct usb_otg_transceiver *self,
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enum usb_otg_transceiver_vbus vbus
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)
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{
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int eno;
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int all = USB_OTG_VBUS_POWER_WITH_CHARGE_PUMP
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| USB_OTG_VBUS_DISCHARGE_VIA_RESISTOR
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| USB_OTG_VBUS_CHARGE_VIA_RESISTOR;
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struct usb_otg_transceiver_write_request requests [] = {
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{ USB_OTG_CONTROL_2_CLEAR, (uint8_t) (all & ~vbus) },
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{ USB_OTG_CONTROL_2_SET, (uint8_t) (all & vbus) }
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};
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eno = usb_otg_transceiver_write(self, &requests [0], COUNT(requests));
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return eno;
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}
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