mirror of
https://git.rtems.org/rtems-libbsd/
synced 2025-05-20 01:50:34 +08:00
326 lines
8.7 KiB
C
326 lines
8.7 KiB
C
#include <machine/rtems-bsd-kernel-space.h>
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/* $OpenBSD: if_rtwn.c,v 1.6 2015/08/28 00:03:53 deraadt Exp $ */
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/*-
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* Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
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* Copyright (c) 2015 Stefan Sperling <stsp@openbsd.org>
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* Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <rtems/bsd/local/opt_wlan.h>
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#include <sys/param.h>
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#include <sys/lock.h>
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#include <sys/mutex.h>
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#include <sys/mbuf.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/queue.h>
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#include <sys/taskqueue.h>
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#include <sys/bus.h>
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#include <sys/endian.h>
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#include <sys/linker.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/rman.h>
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#include <net/if.h>
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#include <net/ethernet.h>
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#include <net/if_media.h>
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#include <net80211/ieee80211_var.h>
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#include <net80211/ieee80211_radiotap.h>
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#include <dev/rtwn/if_rtwnvar.h>
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#include <dev/rtwn/pci/rtwn_pci_var.h>
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#include <dev/rtwn/rtl8192c/r92c_var.h>
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#include <dev/rtwn/rtl8192c/pci/r92ce.h>
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#include <dev/rtwn/rtl8192c/pci/r92ce_reg.h>
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void
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r92ce_init_intr(struct rtwn_softc *sc)
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{
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/* Disable interrupts. */
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rtwn_write_4(sc, R92C_HISR, 0x00000000);
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rtwn_write_4(sc, R92C_HIMR, 0x00000000);
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}
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void
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r92ce_init_edca(struct rtwn_softc *sc)
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{
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/* SIFS */
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rtwn_write_2(sc, R92C_SPEC_SIFS, 0x1010);
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rtwn_write_2(sc, R92C_MAC_SPEC_SIFS, 0x1010);
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rtwn_write_2(sc, R92C_SIFS_CCK, 0x1010);
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rtwn_write_2(sc, R92C_SIFS_OFDM, 0x0e0e);
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/* TXOP */
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rtwn_write_4(sc, R92C_EDCA_BE_PARAM, 0x005ea42b);
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rtwn_write_4(sc, R92C_EDCA_BK_PARAM, 0x0000a44f);
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rtwn_write_4(sc, R92C_EDCA_VI_PARAM, 0x005e4322);
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rtwn_write_4(sc, R92C_EDCA_VO_PARAM, 0x002f3222);
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}
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void
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r92ce_init_bb(struct rtwn_softc *sc)
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{
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/* Enable BB and RF. */
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rtwn_setbits_2(sc, R92C_SYS_FUNC_EN, 0,
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R92C_SYS_FUNC_EN_BBRSTB | R92C_SYS_FUNC_EN_BB_GLB_RST |
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R92C_SYS_FUNC_EN_DIO_RF);
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rtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0xdb83);
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rtwn_write_1(sc, R92C_RF_CTRL,
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R92C_RF_CTRL_EN | R92C_RF_CTRL_RSTB | R92C_RF_CTRL_SDMRSTB);
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rtwn_write_1(sc, R92C_SYS_FUNC_EN,
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R92C_SYS_FUNC_EN_DIO_PCIE | R92C_SYS_FUNC_EN_PCIEA |
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R92C_SYS_FUNC_EN_PPLL | R92C_SYS_FUNC_EN_BB_GLB_RST |
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R92C_SYS_FUNC_EN_BBRSTB);
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rtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80);
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rtwn_setbits_4(sc, R92C_LEDCFG0, 0, 0x00800000);
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r92c_init_bb_common(sc);
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}
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int
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r92ce_power_on(struct rtwn_softc *sc)
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{
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struct r92c_softc *rs = sc->sc_priv;
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uint32_t reg;
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int ntries;
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/* Wait for autoload done bit. */
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for (ntries = 0; ntries < 1000; ntries++) {
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if (rtwn_read_1(sc, R92C_APS_FSMCO) & R92C_APS_FSMCO_PFM_ALDN)
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break;
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DELAY(5);
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}
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if (ntries == 1000) {
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device_printf(sc->sc_dev,
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"timeout waiting for chip autoload\n");
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return (ETIMEDOUT);
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}
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/* Unlock ISO/CLK/Power control register. */
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rtwn_write_1(sc, R92C_RSV_CTRL, 0);
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if (rs->board_type != R92C_BOARD_TYPE_DONGLE) {
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/* bt coex */
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rtwn_setbits_4(sc, R92C_APS_FSMCO, 0,
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R92C_APS_FSMCO_SOP_ABG |
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R92C_APS_FSMCO_SOP_AMB |
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R92C_APS_FSMCO_XOP_BTCK);
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}
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/* Move SPS into PWM mode. */
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rtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b);
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/* Set low byte to 0x0f, leave others unchanged. */
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rtwn_write_1(sc, R92C_AFE_XTAL_CTRL, 0x0f);
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/* TODO: check if we need this for 8188CE */
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if (rs->board_type != R92C_BOARD_TYPE_DONGLE) {
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/* bt coex */
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/* XXX magic from linux */
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rtwn_setbits_4(sc, R92C_AFE_XTAL_CTRL, 0x024800, 0);
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}
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rtwn_setbits_2(sc, R92C_SYS_ISO_CTRL, 0xff00,
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R92C_SYS_ISO_CTRL_PWC_EV12V | R92C_SYS_ISO_CTRL_DIOR);
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DELAY(200);
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/* TODO: linux does additional btcoex stuff here */
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/* Auto enable WLAN. */
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rtwn_setbits_2(sc, R92C_APS_FSMCO, 0, R92C_APS_FSMCO_APFM_ONMAC);
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for (ntries = 0; ntries < 1000; ntries++) {
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if (!(rtwn_read_2(sc, R92C_APS_FSMCO) &
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R92C_APS_FSMCO_APFM_ONMAC))
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break;
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DELAY(5);
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}
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if (ntries == 1000) {
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device_printf(sc->sc_dev, "timeout waiting for MAC auto ON\n");
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return (ETIMEDOUT);
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}
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/* Enable radio, GPIO and LED functions. */
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rtwn_write_2(sc, R92C_APS_FSMCO,
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R92C_APS_FSMCO_AFSM_PCIE |
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R92C_APS_FSMCO_PDN_EN |
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R92C_APS_FSMCO_PFM_ALDN);
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/* Release RF digital isolation. */
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rtwn_setbits_2(sc, R92C_SYS_ISO_CTRL, R92C_SYS_ISO_CTRL_DIOR, 0);
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if (rs->chip & R92C_CHIP_92C)
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rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x77);
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else
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rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x22);
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rtwn_write_4(sc, R92C_INT_MIG, 0);
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if (rs->board_type != R92C_BOARD_TYPE_DONGLE) {
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/* bt coex */
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/* XXX magic from linux */
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rtwn_setbits_1(sc, R92C_AFE_XTAL_CTRL + 2, 0x02, 0);
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}
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rtwn_setbits_1(sc, R92C_GPIO_MUXCFG, R92C_GPIO_MUXCFG_RFKILL, 0);
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reg = rtwn_read_1(sc, R92C_GPIO_IO_SEL);
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if (!(reg & R92C_GPIO_IO_SEL_RFKILL)) {
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device_printf(sc->sc_dev,
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"radio is disabled by hardware switch\n");
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/* XXX how driver will know when radio will be enabled? */
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return (EPERM);
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}
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/* Initialize MAC. */
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rtwn_setbits_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF, 0);
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for (ntries = 0; ntries < 200; ntries++) {
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if (!(rtwn_read_1(sc, R92C_APSD_CTRL) &
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R92C_APSD_CTRL_OFF_STATUS))
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break;
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DELAY(500);
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}
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if (ntries == 200) {
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device_printf(sc->sc_dev,
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"timeout waiting for MAC initialization\n");
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return (ETIMEDOUT);
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}
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/* Enable MAC DMA/WMAC/SCHEDULE/SEC blocks. */
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rtwn_setbits_2(sc, R92C_CR, 0,
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R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN |
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R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN |
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R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN |
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((sc->sc_hwcrypto != RTWN_CRYPTO_SW) ? R92C_CR_ENSEC : 0));
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rtwn_write_4(sc, R92C_MCUTST_1, 0x0);
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return (0);
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}
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void
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r92ce_power_off(struct rtwn_softc *sc)
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{
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#ifndef RTWN_WITHOUT_UCODE
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struct r92c_softc *rs = sc->sc_priv;
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/* Deinit C2H event handler. */
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callout_stop(&rs->rs_c2h_report);
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rs->rs_c2h_paused = 0;
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rs->rs_c2h_pending = 0;
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rs->rs_c2h_timeout = hz;
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#endif
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/* Stop hardware. */
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/* Disable interrupts. */
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rtwn_write_4(sc, R92C_HISR, 0);
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rtwn_write_4(sc, R92C_HIMR, 0);
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/* Stop hardware. */
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rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
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/* Turn off RF. */
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rtwn_write_1(sc, R92C_RF_CTRL, 0);
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/* Reset BB state machine */
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rtwn_setbits_1(sc, R92C_SYS_FUNC_EN, 0, R92C_SYS_FUNC_EN_BB_GLB_RST);
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rtwn_setbits_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_BB_GLB_RST, 0);
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/* Disable MAC DMA/WMAC/SCHEDULE/SEC blocks. */
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rtwn_setbits_2(sc, R92C_CR,
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R92C_CR_HCI_TXDMA_EN | R92C_CR_HCI_RXDMA_EN |
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R92C_CR_TXDMA_EN | R92C_CR_RXDMA_EN | R92C_CR_PROTOCOL_EN |
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R92C_CR_SCHEDULE_EN | R92C_CR_MACTXEN | R92C_CR_MACRXEN |
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R92C_CR_ENSEC,
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0);
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/* If firmware in ram code, do reset. */
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#ifndef RTWN_WITHOUT_UCODE
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if (rtwn_read_1(sc, R92C_MCUFWDL) & R92C_MCUFWDL_RAM_DL_SEL)
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r92ce_fw_reset(sc, RTWN_FW_RESET_SHUTDOWN);
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#endif
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/* TODO: linux does additional btcoex stuff here */
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rtwn_write_2(sc, R92C_AFE_PLL_CTRL, 0x80); /* linux magic number */
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rtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); /* ditto */
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rtwn_write_1(sc, R92C_AFE_XTAL_CTRL, 0x0e); /* different with btcoex */
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rtwn_write_1(sc, R92C_RSV_CTRL, 0x0e);
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rtwn_write_1(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_PDN_EN);
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}
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void
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r92ce_init_ampdu(struct rtwn_softc *sc)
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{
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/* Setup AMPDU aggregation. */
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rtwn_write_4(sc, R92C_AGGLEN_LMT, 0x99997631); /* MCS7~0 */
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rtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16);
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}
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void
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r92ce_post_init(struct rtwn_softc *sc)
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{
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rtwn_write_2(sc, R92C_FWHW_TXQ_CTRL,
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0x1f00 | R92C_FWHW_TXQ_CTRL_AMPDU_RTY_NEW);
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rtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff);
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/* Perform LO and IQ calibrations. */
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r92ce_iq_calib(sc);
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/* Perform LC calibration. */
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r92c_lc_calib(sc);
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r92c_pa_bias_init(sc);
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/* Fix for lower temperature. */
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rtwn_write_1(sc, 0x15, 0xe9);
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#ifndef RTWN_WITHOUT_UCODE
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if (sc->sc_flags & RTWN_FW_LOADED) {
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struct r92c_softc *rs = sc->sc_priv;
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if (sc->sc_ratectl_sysctl == RTWN_RATECTL_FW) {
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/* XXX TODO: fix (see comment in r92cu_init.c) */
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sc->sc_ratectl = RTWN_RATECTL_NET80211;
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} else
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sc->sc_ratectl = sc->sc_ratectl_sysctl;
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/* Start C2H event handling. */
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callout_reset(&rs->rs_c2h_report, rs->rs_c2h_timeout,
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r92c_handle_c2h_report, sc);
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} else
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#endif
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sc->sc_ratectl = RTWN_RATECTL_NONE;
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}
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